文件名称:timebase

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [HTML]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 4.64mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • t**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

实现了时基信号的产生,频率50MHz,在SPARTAN-3E板子上用。-Time-based signal,which developed on board SPARTAN-3E of xilinx.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

timebase

........\device_usage_statistics.html

........\smartpreview.twr

........\templates

........\timebase.gise

........\timebase.ise

........\timebase.ntrc_log

........\timebase.ucf

........\timebase.xise

........\timebase_circle.bgn

........\timebase_circle.bit

........\Timebase_circle.bld

........\Timebase_circle.cmd_log

........\timebase_circle.drc

........\Timebase_circle.fdo

........\Timebase_circle.lso

........\Timebase_circle.ncd

........\Timebase_circle.ngc

........\Timebase_circle.ngd

........\Timebase_circle.ngr

........\Timebase_circle.pad

........\Timebase_circle.par

........\Timebase_circle.pcf

........\Timebase_circle.prj

........\Timebase_circle.ptwx

........\Timebase_circle.stx

........\Timebase_circle.syr

........\Timebase_circle.twr

........\Timebase_circle.twx

........\Timebase_circle.udo

........\Timebase_circle.unroutes

........\Timebase_circle.ut

........\Timebase_circle.vhd

........\Timebase_circle.xpi

........\Timebase_circle.xst

........\Timebase_circle_guide.ncd

........\Timebase_circle_map.map

........\Timebase_circle_map.mrp

........\Timebase_circle_map.ncd

........\Timebase_circle_map.ngm

........\Timebase_circle_map.xrpt

........\Timebase_circle_ngdbuild.xrpt

........\Timebase_circle_pad.csv

........\Timebase_circle_pad.txt

........\Timebase_circle_par.xrpt

........\Timebase_circle_prev_built.ngd

........\Timebase_circle_summary.html

........\Timebase_circle_summary.xml

........\Timebase_circle_usage.xml

........\Timebase_circle_vhdl.prj

........\Timebase_circle_wave.fdo

........\Timebase_circle_xst.xrpt

........\timebase_xdb

........\............\cst.xbcd

........\............\tmp

........\............\...\ise

........\............\...\ise.lock

........\............\...\...\version

........\............\...\...\__OBJSTORE__

........\............\...\...\............\Autonym

........\............\...\...\............\common

........\............\...\...\............\HierarchicalDesign

........\............\...\...\............\..................\HDProject

........\............\...\...\............\..................\.........\HDProject

........\............\...\...\............\..................\.........\HDProject_StrTbl

........\............\...\...\............\..................\__stored_object_table__

........\............\...\...\............\PnAutoRun

........\............\...\...\............\.........\Scripts

........\............\...\...\............\.........\.......\RunOnce_tcl

........\............\...\...\............\.........\.......\RunOnce_tcl_StrTbl

........\............\...\...\............\ProjectNavigator

........\............\...\...\............\ProjectNavigator11

........\............\...\...\............\ProjectNavigatorGui

........\............\...\...\............\...................\CViewSelector

........\............\...\...\............\...................\CViewSelector_StrTbl

........\............\...\...\............\...................\File-SynthesisOnly

........\............\...\...\............\...................\File-SynthesisOnly_StrTbl

........\............\...\...\............\...................\Library-SynthesisOnly

........\............\...\...\............\...................\Library-SynthesisOnly_StrTbl

........\............\...\...\............\...................\Process-BehavioralSim-

........\............\...\...\............\...................\Process-BehavioralSim-DESUT_VHDL_ARCHITECTURE

........\............\...\...\............\...................\Process-BehavioralSim-DESUT_VHDL_ARCHITECTURE_StrTbl

........\............\...\...\............\...................\Process-BehavioralSim-_StrTbl

........\............\...\...\............\...................\Process-SynthesisOnly-

........\............\...\...\............\...................\Process-SynthesisOnly-DESUT_UCF

........\............\...\...\............\...................\Process-SynthesisOnly-DESUT_UCF_StrTbl

........\............\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_ARCHITECTURE

........\............\...\...\............\...............

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