文件名称:Long_shift_gate_level
- 所属分类：
- 软件工程
- 资源属性：
- [VHDL] [源码]
- 上传时间：
- 2012-11-26
- 文件大小：
- 6kb
- 下载次数：
- 0次
- 提 供 者：
- chen-c*******
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
1.
Top module name : SHIFTER (File name : SHIFTER.v)
2.
Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3.
Output pins: OUT [15:0].
4.
Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge.
5.
The SHIFT signal describes the shift number. The shift range is 0 to 15.
6.
When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left.
7.
When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low.
8.
You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
9.
The logarithmic shifter is based on a staged approach (powers of 2). A simple architecture is described as Figure 1.
Top module name : SHIFTER (File name : SHIFTER.v)
2.
Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3.
Output pins: OUT [15:0].
4.
Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge.
5.
The SHIFT signal describes the shift number. The shift range is 0 to 15.
6.
When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left.
7.
When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low.
8.
You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
9.
The logarithmic shifter is based on a staged approach (powers of 2). A simple architecture is described as Figure 1.
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下载文件列表
Long shift gate level
.....................\INCA_libs
.....................\MUX16.v
.....................\MUX16_STAGE1.v
.....................\PATTERN.v
.....................\SHIFTER.v
.....................\SIGN.v
.....................\TESTBED.v
.....................\INCA_libs
.....................\MUX16.v
.....................\MUX16_STAGE1.v
.....................\PATTERN.v
.....................\SHIFTER.v
.....................\SIGN.v
.....................\TESTBED.v