文件名称:uart
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下载文件列表
uart 源码 (Verilog)\tester.v
...................\clock_divider.v
...................\control_operation.v
...................\cpu_interface.v
...................\serial_interface.v
...................\status_registers.v
...................\address_decode.v
...................\uart_tb.v
...................\uart_top.v
...................\xmit_rcv_control.v
uart 源码 (Verilog)
...................\clock_divider.v
...................\control_operation.v
...................\cpu_interface.v
...................\serial_interface.v
...................\status_registers.v
...................\address_decode.v
...................\uart_tb.v
...................\uart_top.v
...................\xmit_rcv_control.v
uart 源码 (Verilog)