文件名称:TMS320C6000DSP
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《TMS320C6000 DSP实用技术与开发案例》针对目前的DSP系统设计，以TI公司的C6000数字信号处理器为硬件平台，详细地介绍了用DSP作为微处理器核的系统的各种工程和算法实现-"TMS320C6000 DSP development of practical techniques and case" for addressing the current DSP system design, in order to TI s C6000 digital signal processor hardware platform, detailed information on using DSP microprocessor core system, as a variety of engineering and algorithm
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TMS320C6000 DSP实用技术与开发案例（书号：17481）源程序
......................................................\c4_3_1.m
......................................................\c4_3_2.asm
......................................................\c4_3_3.asm
......................................................\c4_3_4.cmd
......................................................\c4_3_5.asm
......................................................\c4_6_1.c
......................................................\c5_4_1.asm
......................................................\c5_4_2.asm
......................................................\c5_4_3.cmd
......................................................\c6_3_1.asm
......................................................\c6_3_2.asm
......................................................\c6_3_3.cmd
......................................................\C6_5_1.c
......................................................\c6_5_2.cmd
......................................................\c6_5_3.asm
......................................................\c6_5_4.cmd
......................................................\C6_8_1.c
......................................................\c6_8_2.cmd
......................................................\c6_8_3.asm
......................................................\c7_1_1.c
......................................................\c7_1_2.cmd
......................................................\c7_2_1.m
......................................................\c7_2_2.c
......................................................\c7_2_3.asm
......................................................\c7_3_1.c
......................................................\C7_4_1.c
......................................................\c7_6_1.m
......................................................\C7_7_1.c
......................................................\INTER
......................................................\readme.txt
......................................................\SDRAM
......................................................\SPRAM
......................................................\c4_3_1.m
......................................................\c4_3_2.asm
......................................................\c4_3_3.asm
......................................................\c4_3_4.cmd
......................................................\c4_3_5.asm
......................................................\c4_6_1.c
......................................................\c5_4_1.asm
......................................................\c5_4_2.asm
......................................................\c5_4_3.cmd
......................................................\c6_3_1.asm
......................................................\c6_3_2.asm
......................................................\c6_3_3.cmd
......................................................\C6_5_1.c
......................................................\c6_5_2.cmd
......................................................\c6_5_3.asm
......................................................\c6_5_4.cmd
......................................................\C6_8_1.c
......................................................\c6_8_2.cmd
......................................................\c6_8_3.asm
......................................................\c7_1_1.c
......................................................\c7_1_2.cmd
......................................................\c7_2_1.m
......................................................\c7_2_2.c
......................................................\c7_2_3.asm
......................................................\c7_3_1.c
......................................................\C7_4_1.c
......................................................\c7_6_1.m
......................................................\C7_7_1.c
......................................................\INTER
......................................................\readme.txt
......................................................\SDRAM
......................................................\SPRAM