文件名称:pci-verilog
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USB及PCI总线设计的一些源代码（经测试）-USB and PCI bus design some of the source code
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pci-verilog
...........\pcit32_verilog_lattice
...........\......................\base_addr_chk.v
...........\......................\config_mux.v
...........\......................\glue.v
...........\......................\pargen.v
...........\......................\pci_top.v
...........\......................\rd1008.pdf
...........\......................\retry_count.v
...........\......................\state_machine.v
...........\......................\tstbench.zip
...........\pci_arbi_quicklogic
...........\...................\PCI_ARBI.TF
...........\...................\Pci_arbi.v
...........\...................\PCI_arbiter_readme.txt
...........\pcit32_verilog_lattice
...........\......................\base_addr_chk.v
...........\......................\config_mux.v
...........\......................\glue.v
...........\......................\pargen.v
...........\......................\pci_top.v
...........\......................\rd1008.pdf
...........\......................\retry_count.v
...........\......................\state_machine.v
...........\......................\tstbench.zip
...........\pci_arbi_quicklogic
...........\...................\PCI_ARBI.TF
...........\...................\Pci_arbi.v
...........\...................\PCI_arbiter_readme.txt