文件名称:09-02_fangzhen
- 所属分类：
- 单片机(51,AVR,MSP430等)
- 资源属性：
- [VHDL] [源码]
- 上传时间：
- 2012-11-26
- 文件大小：
- 5kb
- 下载次数：
- 0次
- 提 供 者：
- uh***
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
Every time a byte becomes available from the serial port, then "RxD_data_ready" is active for one clock period.
The PC sends us data through the serial port in 8-bits mode. Ideally, we would need to receive 9 bits from the PC, so that we can drive the 8-bits data bus and the "RS" line of the LCD module. For now, let s use the MSB (bit 7) of the data received to drive "RS", and send only 7 bits to the data bus.
The PC sends us data through the serial port in 8-bits mode. Ideally, we would need to receive 9 bits from the PC, so that we can drive the 8-bits data bus and the "RS" line of the LCD module. For now, let s use the MSB (bit 7) of the data received to drive "RS", and send only 7 bits to the data bus.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
09-02_fangzhen
..............\BIN_BCD_1.v
..............\BIN_BCD_1_TEST.v
..............\BIN_BCD_2.v
..............\BIN_BCD_2_TEST.v
..............\BIN_BCD_3.v
..............\BIN_BCD_3_TEST.v
..............\BIN_BCD_4.v
..............\BIN_BCD_4_TEST.v
..............\LCD_S.v
..............\LCD_S_TEST.v
..............\BIN_BCD_1.v
..............\BIN_BCD_1_TEST.v
..............\BIN_BCD_2.v
..............\BIN_BCD_2_TEST.v
..............\BIN_BCD_3.v
..............\BIN_BCD_3_TEST.v
..............\BIN_BCD_4.v
..............\BIN_BCD_4_TEST.v
..............\LCD_S.v
..............\LCD_S_TEST.v