文件名称:Simplebeep
- 所属分类：
- 单片机(51,AVR,MSP430等)
- 资源属性：
- [Text]
- 上传时间：
- 2012-11-26
- 文件大小：
- 1kb
- 下载次数：
- 0次
- 提 供 者：
- j***
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
FPGAs can easily implement binary counters. Let s start with a 16-bits counter.
Starting from the 25MHz clock, we can simply "divide the clock" using the counter. A 16 bits counter counts from 0 to 65535 (65536 different values). The highest bit of the counter toggles at a frequency of 25000000/65536=381Hz.
Starting from the 25MHz clock, we can simply "divide the clock" using the counter. A 16 bits counter counts from 0 to 65535 (65536 different values). The highest bit of the counter toggles at a frequency of 25000000/65536=381Hz.
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下载文件列表
Simplebeep.txt