文件名称:final_designed

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 956kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • sw***
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利用AVR单片机和FPGA的DDS实现的信号发生器-The use of AVR MCU and FPGA realization of the DDS signal generator
(系统自动生成,下载前可以参看下载内容)

下载文件列表

final designed

..............\ALTPLa.bsf

..............\ALTPLa.ppf

..............\ALTPLa.qip

..............\ALTPLa.v

..............\ALTPLa_bb.v



..............\ALTPLa_waveforms.html



..............\ALTPLL_waveforms.html

..............\atom_netlists

..............\.............\DDS_VHDL.qsf

..............\cmp_state.ini

..............\Controlldiv.bsf

..............\Controlldiv.v

..............\Controlldiv.v.bak

..............\DDS_Controller.bsf

..............\DDS_Controller.v

..............\DDS_Controller.v.bak

..............\dds_synthesizer.bsf

..............\dds_synthesizer.vhd

..............\DDS_VHDL.asm.rpt

..............\DDS_VHDL.bdf

..............\DDS_VHDL.cdf

..............\DDS_VHDL.csv

..............\DDS_VHDL.done

..............\DDS_VHDL.dpf

..............\DDS_VHDL.fit.eqn

..............\DDS_VHDL.fit.rpt

..............\DDS_VHDL.fit.smsg

..............\DDS_VHDL.fit.summary

..............\DDS_VHDL.fld

..............\DDS_VHDL.flow.rpt

..............\DDS_VHDL.map.eqn

..............\DDS_VHDL.map.rpt

..............\DDS_VHDL.map.smsg

..............\DDS_VHDL.map.summary

..............\DDS_VHDL.pin

..............\DDS_VHDL.pof

..............\DDS_VHDL.qpf

..............\DDS_VHDL.qsf

..............\DDS_VHDL.qsf.bak

..............\DDS_VHDL.qws

..............\DDS_VHDL.sim.rpt

..............\DDS_VHDL.sim.tbl

..............\DDS_VHDL.sof

..............\DDS_VHDL.sta.rpt

..............\DDS_VHDL.sta.summary

..............\DDS_VHDL.tan.rpt

..............\DDS_VHDL.tan.summary

..............\DDS_VHDL.tbl

..............\DDS_VHDL.v

..............\DDS_VHDL.vwf

..............\DDS_VHDL_assignment_defaults.qdf

..............\FM_Parallel.bsf

..............\FM_Parallel.v

..............\FM_Parallel.v.bak

..............\int_div.bsf

..............\int_div.v

..............\lpm_constant0.bsf

..............\lpm_constant0.qip

..............\lpm_constant0.v

..............\lpm_constant0_bb.v

..............\lpm_constant1.bsf

..............\lpm_constant1.qip

..............\lpm_constant1.v

..............\lpm_constant10.bsf

..............\lpm_constant10.qip

..............\lpm_constant10.v

..............\lpm_constant10_bb.v

..............\lpm_constant1_bb.v

..............\lpm_constant2.bsf

..............\lpm_constant2.qip

..............\lpm_constant2.v

..............\lpm_constant2_bb.v

..............\lpm_constant3.bsf

..............\lpm_constant3.qip

..............\lpm_constant3.v

..............\lpm_constant3_bb.v

..............\lpm_constant4.bsf

..............\lpm_constant4.qip

..............\lpm_constant4.v

..............\lpm_constant4_bb.v

..............\lpm_constant5.bsf

..............\lpm_constant5.qip

..............\lpm_constant5.v

..............\lpm_constant5_bb.v

..............\lpm_constant6.bsf

..............\lpm_constant6.qip

..............\lpm_constant6.v

..............\lpm_constant6_bb.v

..............\lpm_constant7.bsf

..............\lpm_constant7.qip

..............\lpm_constant7.v

..............\lpm_constant7_bb.v

..............\lpm_constant8.bsf

..............\lpm_constant8.qip

..............\lpm_constant8.v

..............\lpm_constant8_bb.v

..............\lpm_constant9.bsf

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