文件名称:Design_and_verification_verilog_hdl

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  • 2012-11-26
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设计与验证verilog hdl配套光盘-Design and verification verilog hdl" supporting CD-ROM
相关搜索: Verilog
verification

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下载文件列表

《设计与验证verilog hdl》配套光盘

.................................\Example-2-1

.................................\...........\HelloVlog.v

.................................\Example-3-1

.................................\...........\FullAdd.v

.................................\...........\transcript

.................................\Example-3-2

.................................\...........\FullAdd.v

.................................\Example-3-3

.................................\...........\CRC10.v

.................................\Example-4-1

.................................\...........\cnt.prd

.................................\...........\cnt.prj

.................................\...........\rev_1

.................................\...........\.....\cnt1.edf

.................................\...........\.....\cnt1.fse

.................................\...........\.....\cnt1.srm

.................................\...........\.....\cnt1.srr

.................................\...........\.....\cnt1.srs

.................................\...........\.....\cnt1.tlg

.................................\...........\.....\cnt2.edf

.................................\...........\.....\cnt2.fse

.................................\...........\.....\cnt2.srm

.................................\...........\.....\cnt2.srr

.................................\...........\.....\cnt2.srs

.................................\...........\.....\cnt2.tlg

.................................\...........\.....\cnt3.edf

.................................\...........\.....\cnt3.fse

.................................\...........\.....\cnt3.srm

.................................\...........\.....\cnt3.srr

.................................\...........\.....\cnt3.srs

.................................\...........\.....\cnt3.tlg

.................................\...........\.....\par_1

.................................\...........\.....\syntmp

.................................\...........\.....\......\cnt1.plg

.................................\...........\.....\......\cnt2.msg

.................................\...........\.....\......\cnt2.plg

.................................\...........\.....\......\cnt3.msg

.................................\...........\.....\......\cnt3.plg

.................................\...........\source

.................................\...........\......\cnt1.v

.................................\...........\......\cnt2.v

.................................\...........\......\cnt3.v

.................................\...........\......\syntmp.msg

.................................\...........\示例说明.doc

.................................\Example-4-10

.................................\............\bibus

.................................\............\.....\bibus.prd

.................................\............\.....\bibus.prj

.................................\............\.....\bibus.v

.................................\............\.....\decode.v

.................................\............\.....\rev_1

.................................\............\.....\.....\bibus.fse

.................................\............\.....\.....\bibus.srd

.................................\............\.....\.....\bibus.srm

.................................\............\.....\.....\bibus.srr

.................................\............\.....\.....\bibus.srs

.................................\............\.....\.....\bibus.sxr

.................................\............\.....\.....\bibus.tcl

.................................\............\.....\.....\bibus.tlg

.................................\............\.....\.....\bibus.vqm

.................................\............\.....\.....\bibus.xrf

.................................\............\.....\.....\bibus_cons.tcl

.................................\............\.....\.....\bibus_rm.tcl

.................................\............\.....\.....\rpt_bibus.areasrr

.................................\............\.....\.....\rpt_bibus_areasrr.htm

.................................\............\.....\.....\syntmp

............

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