文件名称:final_decode
介绍说明－－下载内容均来自于网络，请自行研究使用
rs解码器在fpga上的实现，采用的modelsim开发平台
-rs on fpga decoder in the realization of the development platform used in modelsim
-rs on fpga decoder in the realization of the development platform used in modelsim
(系统自动生成,下载前可以参看下载内容)
下载文件列表
final_decode
............\addr_generate.vhd
............\bansui1.vhd
............\decode1.vhd
............\fangcheng
............\.........\fangcheng.vhd
............\.........\mul_decode.vhd
............\.........\testbench_fangcheng.vhd
............\fangcheng1.vhd
............\fifo.vhd
............\maichong.vhd
............\mul.vhd
............\ni_rom.vhd
............\qiansousuo1.vhd
............\ram1.vhd
............\testtop.vhd
............\top.vhd
............\addr_generate.vhd
............\bansui1.vhd
............\decode1.vhd
............\fangcheng
............\.........\fangcheng.vhd
............\.........\mul_decode.vhd
............\.........\testbench_fangcheng.vhd
............\fangcheng1.vhd
............\fifo.vhd
............\maichong.vhd
............\mul.vhd
............\ni_rom.vhd
............\qiansousuo1.vhd
............\ram1.vhd
............\testtop.vhd
............\top.vhd