文件名称:myprojects
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同步数字复接的设计及其FPGA实现
在简要介绍同步数字复接基本原理的基础上，采用VHDL语言对同步数字复接各组成模块进行了设计，并在ISE集成环境下进行了设计描述、综合、布局布线及时序仿真，取得了正确的设计结果，同时利用中小容量的FPGA实现了同步数字复接功能。
基群速率数字信号的合成设备和分接设备是电信网络中使用较多的关键设备，在数字程控交换机的用户模块、小灵通基站控制器和集团电话中都需要使用这种同步数字复接设备。近年来，随着需要自建内部通信系统的公司和企业不断增多，同步数字复接设备的使用需求也在增加。FPGA(现场可编程门阵列)器件的高性能简化了数字通信系统的设计与实现。本文基于FPGA的技术特点，结合数字复接技术的基本原理，实现了基群速率(2048kbps)数字信号的数字分接与复接。
-VHDL
在简要介绍同步数字复接基本原理的基础上，采用VHDL语言对同步数字复接各组成模块进行了设计，并在ISE集成环境下进行了设计描述、综合、布局布线及时序仿真，取得了正确的设计结果，同时利用中小容量的FPGA实现了同步数字复接功能。
基群速率数字信号的合成设备和分接设备是电信网络中使用较多的关键设备，在数字程控交换机的用户模块、小灵通基站控制器和集团电话中都需要使用这种同步数字复接设备。近年来，随着需要自建内部通信系统的公司和企业不断增多，同步数字复接设备的使用需求也在增加。FPGA(现场可编程门阵列)器件的高性能简化了数字通信系统的设计与实现。本文基于FPGA的技术特点，结合数字复接技术的基本原理，实现了基群速率(2048kbps)数字信号的数字分接与复接。
-VHDL
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下载文件列表
myprojects
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