文件名称:serial_uart_top_new

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 142kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • L***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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FPGA Cycloneii 系列的,测试串口通信程序,编程语言简洁,串口速率是115200bps,测试后好用的-Series FPGA Cycloneii to test the serial communication program, the programming language is simple and serial rates are 115200bps, easy-to-use test
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下载文件列表

serial_uart_top_new

...................\serial_uart_top_new

...................\...................\bd_generator.v

...................\...................\bd_generator.v.bak

...................\...................\counter.v

...................\...................\counter.v.bak

...................\...................\counter_s.v

...................\...................\db

...................\...................\..\prev_cmp_serial_uart_top.asm.qmsg

...................\...................\..\prev_cmp_serial_uart_top.fit.qmsg

...................\...................\..\prev_cmp_serial_uart_top.map.qmsg

...................\...................\..\prev_cmp_serial_uart_top.sim.qmsg

...................\...................\..\prev_cmp_serial_uart_top.tan.qmsg

...................\...................\..\serial_uart_top.db_info

...................\...................\..\wed.wsf

...................\...................\deal.bsf

...................\...................\deal.v

...................\...................\deal.v.bak

...................\...................\deal1.bsf

...................\...................\deal1.v

...................\...................\deal1.v.bak

...................\...................\dealx.bsf

...................\...................\dealx.v

...................\...................\dealx.v.bak

...................\...................\detector.v

...................\...................\detector.v.bak

...................\...................\get.bsf

...................\...................\get.v

...................\...................\get.v.bak

...................\...................\instruc2main.bsf

...................\...................\instruc2main.v

...................\...................\instruc2main.v.bak

...................\...................\parity_verifier.v

...................\...................\parity_verifier.v.bak

...................\...................\prev_cmp_serial_uart_top.qmsg

...................\...................\serial_uart_top.asm.rpt

...................\...................\serial_uart_top.bdf

...................\...................\serial_uart_top.cdf

...................\...................\serial_uart_top.done

...................\...................\serial_uart_top.dpf

...................\...................\serial_uart_top.fit.rpt

...................\...................\serial_uart_top.fit.smsg

...................\...................\serial_uart_top.fit.summary

...................\...................\serial_uart_top.flow.rpt

...................\...................\serial_uart_top.map.rpt

...................\...................\serial_uart_top.map.smsg

...................\...................\serial_uart_top.map.summary

...................\...................\serial_uart_top.pin

...................\...................\serial_uart_top.pof

...................\...................\serial_uart_top.qpf

...................\...................\serial_uart_top.qsf

...................\...................\serial_uart_top.qws

...................\...................\serial_uart_top.sim.rpt

...................\...................\serial_uart_top.sof

...................\...................\serial_uart_top.tan.rpt

...................\...................\serial_uart_top.tan.summary

...................\...................\serial_uart_top.vwf

...................\...................\shift_reg.v

...................\...................\shift_reg.v.bak

...................\...................\switcher.v

...................\...................\switcher.v.bak

...................\...................\switcher_bus.v

...................\...................\switcher_bus.v.bak

...................\...................\uart_core.v

...................\...................\uart_core.v.bak

...................\...................\uart_top.bdf

...................\...................\uart_top.bsf

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