文件名称:lab5
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VHDL xilinx例子-vhdl xilinx example............
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下载文件列表
lab5
....\Assembler
....\.........\KCPSM3.EXE
....\.........\program.psm
....\.........\ROM_form.coe
....\.........\ROM_form.v
....\.........\ROM_form.vhd
....\coregen
....\.......\bbfifo_16x8.vhd
....\.......\coregen.ise
....\.......\coregen.ise_ISE_Backup
....\.......\coregen.restore
....\.......\coregen_ise10migration.zip
....\.......\coregen_ise9migration.zip
....\.......\coregen_xdb
....\.......\...........\tmp
....\.......\kcpsm3.vhd
....\.......\kcuart_rx.vhd
....\.......\kcuart_tx.vhd
....\.......\loopback.ucf
....\.......\loopback.vhd
....\.......\loopback_summary.html
....\.......\my_dcm.xaw
....\.......\uart_rx.vhd
....\.......\uart_tx.vhd
....\.......\_xmsgs
....\testbench.vhd
....\Assembler
....\.........\KCPSM3.EXE
....\.........\program.psm
....\.........\ROM_form.coe
....\.........\ROM_form.v
....\.........\ROM_form.vhd
....\coregen
....\.......\bbfifo_16x8.vhd
....\.......\coregen.ise
....\.......\coregen.ise_ISE_Backup
....\.......\coregen.restore
....\.......\coregen_ise10migration.zip
....\.......\coregen_ise9migration.zip
....\.......\coregen_xdb
....\.......\...........\tmp
....\.......\kcpsm3.vhd
....\.......\kcuart_rx.vhd
....\.......\kcuart_tx.vhd
....\.......\loopback.ucf
....\.......\loopback.vhd
....\.......\loopback_summary.html
....\.......\my_dcm.xaw
....\.......\uart_rx.vhd
....\.......\uart_tx.vhd
....\.......\_xmsgs
....\testbench.vhd