文件名称:VHDLprogram
- 所属分类:
- VHDL编程
- 资源属性:
- [ASM] [源码]
- 上传时间:
- 2012-11-26
- 文件大小:
- 1.72mb
- 下载次数:
- 0次
- 提 供 者:
- zhouw*****
- 相关连接:
- 无
- 下载说明:
- 别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容均来自于网络,请自行研究使用
含有各类寄存器,AD和DA转换器,各种算法,有限状态机,还些许组合逻辑电路设计代码-Containing various types of registers, AD and DA converters, a variety of algorithms, finite state machine, but also some combinational logic circuit design code
相关搜索: ad
vhdl
VHDL
AD
VHDL
AD
寄存器
ad
vhdl
state
machine
转换器
VHDL
algorithms
code
Circuit
Design
with
VHDL
vhdl
VHDL
AD
VHDL
AD
寄存器
ad
vhdl
state
machine
转换器
VHDL
algorithms
code
Circuit
Design
with
VHDL
(系统自动生成,下载前可以参看下载内容)
下载文件列表
adder
.....\adder.ise
.....\adder.ise_ISE_Backup
.....\adder.ntrc_log
.....\adder.ut
.....\adder.vhd
.....\adder_cs.cel
.....\adder_cs.ucf
.....\adder_prev_built.ngd
.....\adder_summary.html
.....\_xmsgs
adder_cs
........\adder_cs.ise
........\adder_cs.ise_ISE_Backup
........\adder_cs.ntrc_log
........\adder_cs.ucf
........\adder_CS.ut
........\adder_CS.vhd
........\adder_CS_summary.html
........\iscas.vhd
........\test.vhd
........\test_PK.vhd
count
.....\core_counnt.asy
.....\core_counnt.edn
.....\core_counnt.sym
.....\core_counnt.v
.....\core_counnt.veo
.....\core_counnt.vhd
.....\core_counnt.vho
.....\core_counnt.xco
.....\core_counnt_flist.txt
.....\core_count.xco
.....\count.ise
.....\count.ise_ISE_Backup
.....\count.ntrc_log
.....\counter.ucf
.....\counter.ut
.....\counter.vhd
.....\counter_summary.html
.....\templates
.....\.........\coregen.xml
.....\test.xco
.....\vga_16.vhd
.....\_cg
.....\_xmsgs
.....\__ISE_repository_count.ise_.lock
counter
.......\counter.ise
.......\counter.ise_ISE_Backup
.......\counter.ntrc_log
.......\counter.vhd
.......\count_sim.jhd
.......\count_sim.tbw
.......\count_sim.tbw.bak
.......\count_sim.tbw_trans
.......\count_top.ut
.......\count_top.vhd
.......\count_top_summary.html
.......\HEX2LED_4.vhd
.......\vga_16.vhd
.......\work
.......\....\count
.......\....\.....\behavioral.asm
.......\....\.....\behavioral.dat
.......\....\.....\_primary.dat
.......\....\counter
.......\....\.......\behavioral.asm
.......\....\.......\behavioral.dat
.......\....\.......\_primary.dat
.......\....\counter_cfg
.......\....\...........\_primary.dat
.......\....\...........\_vhdl.asm
.......\....\count_sim
.......\....\.........\testbench_arch.asm
.......\....\.........\testbench_arch.dat
.......\....\.........\_primary.dat
.......\....\_info
.......\_cg
.......\...\_cg_exc.out
.......\_xmsgs
.......\__ISE_repository_counter.ise_.lock
counter_core
............\counter.asy
............\counter.edn
............\counter.sym
............\counter.ucf
............\counter.v
............\counter.veo
............\counter.vhd
............\counter.vho
............\counter.xco
............\counter_core.ise
............\counter_core.ise_ISE_Backup
............\counter_core.npl
............\counter_core.npl_ISE_Backup
............\counter_core.ntrc_log
............\counter_flist.txt
............\count_top.ut
............\count_top.vhd
.....\adder.ise
.....\adder.ise_ISE_Backup
.....\adder.ntrc_log
.....\adder.ut
.....\adder.vhd
.....\adder_cs.cel
.....\adder_cs.ucf
.....\adder_prev_built.ngd
.....\adder_summary.html
.....\_xmsgs
adder_cs
........\adder_cs.ise
........\adder_cs.ise_ISE_Backup
........\adder_cs.ntrc_log
........\adder_cs.ucf
........\adder_CS.ut
........\adder_CS.vhd
........\adder_CS_summary.html
........\iscas.vhd
........\test.vhd
........\test_PK.vhd
count
.....\core_counnt.asy
.....\core_counnt.edn
.....\core_counnt.sym
.....\core_counnt.v
.....\core_counnt.veo
.....\core_counnt.vhd
.....\core_counnt.vho
.....\core_counnt.xco
.....\core_counnt_flist.txt
.....\core_count.xco
.....\count.ise
.....\count.ise_ISE_Backup
.....\count.ntrc_log
.....\counter.ucf
.....\counter.ut
.....\counter.vhd
.....\counter_summary.html
.....\templates
.....\.........\coregen.xml
.....\test.xco
.....\vga_16.vhd
.....\_cg
.....\_xmsgs
.....\__ISE_repository_count.ise_.lock
counter
.......\counter.ise
.......\counter.ise_ISE_Backup
.......\counter.ntrc_log
.......\counter.vhd
.......\count_sim.jhd
.......\count_sim.tbw
.......\count_sim.tbw.bak
.......\count_sim.tbw_trans
.......\count_top.ut
.......\count_top.vhd
.......\count_top_summary.html
.......\HEX2LED_4.vhd
.......\vga_16.vhd
.......\work
.......\....\count
.......\....\.....\behavioral.asm
.......\....\.....\behavioral.dat
.......\....\.....\_primary.dat
.......\....\counter
.......\....\.......\behavioral.asm
.......\....\.......\behavioral.dat
.......\....\.......\_primary.dat
.......\....\counter_cfg
.......\....\...........\_primary.dat
.......\....\...........\_vhdl.asm
.......\....\count_sim
.......\....\.........\testbench_arch.asm
.......\....\.........\testbench_arch.dat
.......\....\.........\_primary.dat
.......\....\_info
.......\_cg
.......\...\_cg_exc.out
.......\_xmsgs
.......\__ISE_repository_counter.ise_.lock
counter_core
............\counter.asy
............\counter.edn
............\counter.sym
............\counter.ucf
............\counter.v
............\counter.veo
............\counter.vhd
............\counter.vho
............\counter.xco
............\counter_core.ise
............\counter_core.ise_ISE_Backup
............\counter_core.npl
............\counter_core.npl_ISE_Backup
............\counter_core.ntrc_log
............\counter_flist.txt
............\count_top.ut
............\count_top.vhd