文件名称:add_eight
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用VHDL写的一个8位全加器的实验程序,供新手参考-Use VHDL to write an 8-bit full adder of the experimental procedures
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下载文件列表
add_eight
.........\8位全加器
.........\.........\eight.acf
.........\.........\eight.fit
.........\.........\eight.hex
.........\.........\eight.hif
.........\.........\eight.mmf
.........\.........\eight.ndb
.........\.........\eight.pin
.........\.........\eight.pof
.........\.........\eight.rpt
.........\.........\eight.scf
.........\.........\eight.snf
.........\.........\eight.sof
.........\.........\EIGHT.sym
.........\.........\eight.ttf
.........\.........\eight.vhd
.........\.........\LIB.DLS
.........\.........\U1058035.DLS
.........\.........\U3254266.DLS
.........\.........\U4070388.DLS
.........\.........\U6288413.DLS
.........\.........\U8872605.DLS
.........\8位全加器
.........\.........\eight.acf
.........\.........\eight.fit
.........\.........\eight.hex
.........\.........\eight.hif
.........\.........\eight.mmf
.........\.........\eight.ndb
.........\.........\eight.pin
.........\.........\eight.pof
.........\.........\eight.rpt
.........\.........\eight.scf
.........\.........\eight.snf
.........\.........\eight.sof
.........\.........\EIGHT.sym
.........\.........\eight.ttf
.........\.........\eight.vhd
.........\.........\LIB.DLS
.........\.........\U1058035.DLS
.........\.........\U3254266.DLS
.........\.........\U4070388.DLS
.........\.........\U6288413.DLS
.........\.........\U8872605.DLS