文件名称:an181
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- Linux/Unix编程
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- [C/C++] [源码]
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- 2008-10-13
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altera epxa1的例子程序-ALTERA epxa1 examples of procedures
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压缩包 : 985416an181.zip 列表 an181_2_2.pdf example_designs/ example_designs/multimaster_ahb/ example_designs/multimaster_ahb/ads/ example_designs/multimaster_ahb/ads/debug.fsf example_designs/multimaster_ahb/ads/embedded_stripe.bsf example_designs/multimaster_ahb/ads/embedded_stripe.h example_designs/multimaster_ahb/ads/embedded_stripe.s example_designs/multimaster_ahb/ads/embedded_stripe.v example_designs/multimaster_ahb/ads/embedded_stripe_bb.v example_designs/multimaster_ahb/ads/memmap.v example_designs/multimaster_ahb/ads/multi_master_reference_design.csf example_designs/multimaster_ahb/ads/multi_master_reference_design.esf example_designs/multimaster_ahb/ads/multi_master_reference_design.psf example_designs/multimaster_ahb/ads/multi_master_reference_design.quartus example_designs/multimaster_ahb/ads/multi_master_reference_design.sbd example_designs/multimaster_ahb/ads/multi_master_reference_design.ssf example_designs/multimaster_ahb/ads/powerkit.tcl example_designs/multimaster_ahb/ads/powerkit_lib.tcl example_designs/multimaster_ahb/ads/release.fsf example_designs/multimaster_ahb/ads/sbd2sim.bat example_designs/multimaster_ahb/ads/simulation/ example_designs/multimaster_ahb/ads/simulation/modelsim/ example_designs/multimaster_ahb/ads/simulation/modelsim/bus_translate.bat example_designs/multimaster_ahb/ads/simulation/modelsim/compile_and_run_rtl_busfuncmodel_v.do example_designs/multimaster_ahb/ads/simulation/modelsim/compile_and_run_rtl_fullmodel_v.do example_designs/multimaster_ahb/ads/simulation/modelsim/compile_and_run_timing_busfuncmodel_v.do example_designs/multimaster_ahb/ads/simulation/modelsim/compile_and_run_timing_fullmodel_v.do example_designs/multimaster_ahb/ads/simulation/modelsim/input.dat example_designs/multimaster_ahb/ads/simulation/modelsim/modelsim.mpf example_designs/multimaster_ahb/ads/simulation/modelsim/slavememory.0.dat example_designs/multimaster_ahb/ads/simulation/modelsim/slavememory.cfg.dat example_designs/multimaster_ahb/ads/simulation/modelsim/wave_interconnect_matrix.do example_designs/multimaster_ahb/ads/simulation/modelsim/wave_rtl_bfm.do example_designs/multimaster_ahb/ads/simulation/modelsim/wave_rtl_fullstripe.do example_designs/multimaster_ahb/ads/simulation/modelsim/wave_timing_busfuncmodel.do example_designs/multimaster_ahb/ads/simulation/modelsim/wave_timing_fullstripe.do example_designs/multimaster_ahb/ads/software/ example_designs/multimaster_ahb/ads/software/multi_master_reference_design.s example_designs/multimaster_ahb/gnu/ example_designs/multimaster_ahb/gnu/debug.fsf example_designs/multimaster_ahb/gnu/embedded_stripe.bsf example_designs/multimaster_ahb/gnu/embedded_stripe.h example_designs/multimaster_ahb/gnu/embedded_stripe.s example_designs/multimaster_ahb/gnu/embedded_stripe.v example_designs/multimaster_ahb/gnu/embedded_stripe_bb.v example_designs/multimaster_ahb/gnu/memmap.v example_designs/multimaster_ahb/gnu/multi_master_reference_design.csf example_designs/multimaster_ahb/gnu/multi_master_reference_design.esf example_designs/multimaster_ahb/gnu/multi_master_reference_design.psf example_designs/multimaster_ahb/gnu/multi_master_reference_design.quartus example_designs/multimaster_ahb/gnu/multi_master_reference_design.sbd example_designs/multimaster_ahb/gnu/multi_master_reference_design.ssf example_designs/multimaster_ahb/gnu/powerkit.tcl example_designs/multimaster_ahb/gnu/powerkit_lib.tcl example_designs/multimaster_ahb/gnu/release.fsf example_designs/multimaster_ahb/gnu/sbd2sim.bat example_designs/multimaster_ahb/gnu/simulation/ example_designs/multimaster_ahb/gnu/simulation/modelsim/ example_designs/multimaster_ahb/gnu/simulation/modelsim/compile_and_run_rtl_busfuncmodel_v.do example_designs/multimaster_ahb/gnu/simulation/modelsim/compile_and_run_rtl_fullmodel_v.do example_designs/multimaster_ahb/gnu/simulation/modelsim/compile_and_run_timing_busfuncmodel_v.do example_designs/multimaster_ahb/gnu/simulation/modelsim/compile_and_run_timing_fullmodel_v.do example_designs/multimaster_ahb/gnu/simulation/modelsim/input.dat example_designs/multimaster_ahb/gnu/simulation/modelsim/modelsim.mpf example_designs/multimaster_ahb/gnu/simulation/modelsim/slavememory.0.dat example_designs/multimaster_ahb/gnu/simulation/modelsim/slavememory.cfg.dat example_designs/multimaster_ahb/gnu/simulation/modelsim/wave_interconnect_matrix.do example_designs/multimaster_ahb/gnu/simulation/modelsim/wave_rtl_bfm.do example_designs/multimaster_ahb/gnu/simulation/modelsim/wave_rtl_fullstripe.do example_designs/multimaster_ahb/gnu/simulation/modelsim/wave_timing_busfuncmodel.do example_designs/multimaster_ahb/gnu/simulation/modelsim/wave_timing_fullstripe.do example_designs/multimaster_ahb/gnu/software/ example_designs/multimaster_ahb/gnu/software/multi_master_reference_design.s example_designs/multimaster_ahb/rtl/ example_designs/multimaster_ahb/rtl/address_control_mux.v example_designs/multimaster_ahb/rtl/ahb_include.v example_designs/multimaster_ahb/rtl/ahb_slave_sm.v example_designs/multimaster_ahb/rtl/alu.v example_designs/multimaster_ahb/rtl/alu_regfile.v example_designs/multimaster_ahb/rtl/alu_slave.v example_designs/multimaster_ahb/rtl/arbiter.v example_designs/multimaster_ahb/rtl/burst_slave.v example_designs/multimaster_ahb/rtl/default_slave.v example_designs/multimaster_ahb/rtl/input_stage.v example_designs/multimaster_ahb/rtl/interconnect_decoder.v example_designs/multimaster_ahb/rtl/interconnect_maxtrix.v example_designs/multimaster_ahb/rtl/interconnect_mux.v example_designs/multimaster_ahb/rtl/interconnect_mux_resp_layer1.v example_designs/multimaster_ahb/rtl/interconnect_mux_resp_layer2.v example_designs/multimaster_ahb/rtl/master_alu.v example_designs/multimaster_ahb/rtl/master_burst_read.v example_designs/multimaster_ahb/rtl/master_burst_write.v example_designs/multimaster_ahb/rtl/master_single_read.v example_designs/multimaster_ahb/rtl/master_single_write.v example_designs/multimaster_ahb/rtl/multi_master_reference_design.v example_designs/multimaster_ahb/rtl/narrow_regfile.v example_designs/multimaster_ahb/rtl/narrow_slave.v example_designs/multimaster_ahb/rtl/pld_bus1_decoder.v example_designs/multimaster_ahb/rtl/pld_bus2_decoder.v example_designs/multimaster_ahb/rtl/read_data_bus_and_slave_response_pld1.v example_designs/multimaster_ahb/rtl/read_data_bus_and_slave_response_pld2.v example_designs/multimaster_ahb/rtl/regfile.v example_designs/multimaster_ahb/rtl/single_transaction_slave.v example_designs/multimaster_ahb/rtl/wait_state_gen.v example_designs/multimaster_ahb/rtl/wide_slave.v example_designs/multimaster_ahb/rtl/write_data_bus_mux.v example_designs/multimaster_ahb/testbench/ example_designs/multimaster_ahb/testbench/ahb_bus_tb.v