文件名称:vhdl_source
介绍说明－－下载内容均来自于网络，请自行研究使用
MP3 for XPLA3 XILINX.CPLD,必须在XILINX的FPGA芯片下使用,因为IP核是xilinx-MP3 for XPLA3 XILINX.CPLD, must XILINX use of FPGA chip, as is the Xilinx IP core
(系统自动生成,下载前可以参看下载内容)
下载文件列表
vhdl_source
...........\cnt25.vhd
...........\cnt3.vhd
...........\cnt5.vhd
...........\command_state_machine.vhd
...........\dnld_interface.vhd
...........\flash_cntr.vhd
...........\i2c_master.vhd
...........\lcd_control.vhd
...........\main_ctrl_state_machine.vhd
...........\mp3_cpld.vhd
...........\mp3_post.vhd
...........\mpeg_chip_ctrl.vhd
...........\on_off_logic.vhd
...........\parallel_port.vhd
...........\play_logic_state_machine.vhd
...........\play_modes.vhd
...........\power_ctrl.vhd
...........\shift.vhd
...........\sound_control.vhd
...........\upcnt2.vhd
...........\upcnt3.vhd
...........\upcnt4.vhd
...........\updwncnt4.vhd
...........\cnt25.vhd
...........\cnt3.vhd
...........\cnt5.vhd
...........\command_state_machine.vhd
...........\dnld_interface.vhd
...........\flash_cntr.vhd
...........\i2c_master.vhd
...........\lcd_control.vhd
...........\main_ctrl_state_machine.vhd
...........\mp3_cpld.vhd
...........\mp3_post.vhd
...........\mpeg_chip_ctrl.vhd
...........\on_off_logic.vhd
...........\parallel_port.vhd
...........\play_logic_state_machine.vhd
...........\play_modes.vhd
...........\power_ctrl.vhd
...........\shift.vhd
...........\sound_control.vhd
...........\upcnt2.vhd
...........\upcnt3.vhd
...........\upcnt4.vhd
...........\updwncnt4.vhd