文件名称:SRT
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verilog code
radix-2 SRT divider
input [7:0]Dividend
input [3:0]Divisor
output [4:0]Quotient
output [8:0]Remainder
-verilog coderadix-2 SRT dividerinput [7:0] Dividend input [3:0] Divisor output [4:0] Quotient output [8:0] Remainder
radix-2 SRT divider
input [7:0]Dividend
input [3:0]Divisor
output [4:0]Quotient
output [8:0]Remainder
-verilog coderadix-2 SRT dividerinput [7:0] Dividend input [3:0] Divisor output [4:0] Quotient output [8:0] Remainder
(系统自动生成,下载前可以参看下载内容)
下载文件列表
SRT.v