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H0484050023
- eda zhuangtaiji vhdl
zhuangtaiji
- 这个是我新编译的程序代码，主要是实现状态机的采样功能-this is my translation of the new code, the main state machine is the sampling function
zhuangtaiji
- 给出了一个简单明了描述状态机的方法,可以学到怎样用vhdl描述状态机
H0484050023
- eda zhuangtaiji vhdl
zhuangtaiji
- 这个是我新编译的程序代码，主要是实现状态机的采样功能-this is my translation of the new code, the main state machine is the sampling function
zhuangtaiji
- 给出了一个简单明了描述状态机的方法,可以学到怎样用vhdl描述状态机-Gives a simple way to describe the state machine, you can learn how to use VHDL to describe state machines
zhuangtaiji
- 有限状态机及其设计技术是实用数字系统设计中的重要组成部分,也是实现高效可靠逻辑控制的重要途径,本程序为单进程moore型有限状态机底层设计源代码.-This procedure as a single process moore-type finite state machine underlying the design of the source code.
zhuangtaiji
- 这是一个最最常用的用vhdl写的状态机，几乎哪儿都用得到-a very good state machine
zhuangtaiji
- 十种状态机例子（VHDL）包括米勒型和莫尔型的状态机。-Dozens of examples of state machine (VHDL), including Miller and Moore type state machine.
moore
- mooor状态机的VHDL程序，代码，状态机，关键是分析各个状态之间的切换-mooor zhuangtaiji zhuagtaiji guanjianshi gege zhuangtai zhijian de qiehuan
zhuangtaiji
- 状态机 FPGA 中的实现，已经通过FPGA的仿真！-FPGA Realization of the state machine has been through the FPGA of simulation!
zhuangtaiji
- 检测姓名序列的状态机。使用VERILOG编写。平台是QuartusII9.1。Cyclone -Detection of sequence state machine name. Prepared using VERILOG. Platform is QuartusII9.1. Cyclone III
zhuangtaiji
- 状态机的使用 verilog】 真的就这么多了-verilog
you-xian-zhuangtaiji
- 状态机在桩考系统中的应用，如何使用状态机等，以及桩考的流程，也是挺不错的资料哈-State machine in the Zhuangkao system, how to use the state machine, as well as Zhuangkao process, the information is very good Kazakhstan
zhuangtaiji
- 用状态机实现序列检测器的设计，并对其进行仿真和硬件测试。-With the sequence detector state machine design, and its simulation and hardware testing.
zhuangtaiji
- vhdl状态机程序，经实验验证，没有错误！完美运行，可以用以了解状态机的初步应用！-vhdl state machine program, proved by experiments that there are no errors! Perfect run, can be used to understand the initial application of the state machine!
ZHUANGTAIJI
- 主状态与子状态在状态机中的运用,来自labview宝典-The main state and son state in the application of state machine
zhuangtaiji
- VHDL语言实现LED灯循环左移、右移，全亮全灭功能-VHDL language LED light is rotated to the left, right, full brightness all off
zhuangtaiji
- 基于FPGA的用状态机的verilog程序源代码-FPGA-based state machines using verilog source code