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VHDL语言的UART串行接口芯片程序
- VHDL语言的UART串行接口芯片程序
bingzhuanchuan
- 这是一个用VHDL语言编写的并口转串口程序,在altera开发系统下验证通过,运用于开发板与计算机之间的通信,源程序可以提供参考-This is a use of the VHDL language Parallel to Serial procedures, In altera development system under test passed, the development of applied between the pa
chuan_kou_tong_xun
- 用VHDL语言编写的串口通信程序 通过仿真验证-using VHDL prepared by the serial communication program through simulation
myUART
- 这是我用Xilinx公司的sparten3开发板,ISE集成开发环境,用VHDL语言开发的串口全双工通信程序,供大家参考,共同学习。-This is the company I used the sparten3 Xilinx development boards, ISE Integrated Development Environment, Using VHDL development of the full-duplex seri
UART_VHDL
- 用VHDL语言编写的串口通讯器,按串口232协议编写。-Using VHDL language serial communication device, according to the preparation of serial 232 agreement.
uart
- 采用CPLD实现串口通信(Verilog硬件描述语言)-Realize the use of CPLD serial communication (Verilog Hardware Descr iption Language)
wumayi
- 研究了传统误码仪的工作原理与结构,并利用VHDL语言在FPGA芯片上模拟实现了绝大部分的传统误码仪的功能,如LCD显示驱动,串口通信驱动,误码测试,数据存储芯片驱动等功能.-Research on the traditional instrument of the working principle of error with the structure and language use of VHDL simulation in th
uart_v11
- uart串口的vhdl语言程序。本人调试过 ,非常好用-serial UART VHDL Language Program. I debug, and very easy to use
uart(Verilog)
- uart异步串口通信协议的源代码,用vhdl语言编写,并且有完整得测试文件-UART asynchronous serial communication protocol source code, using VHDL language, and may have a complete test file
chuankou
- 用硬件VHDL语言实现的串口通信的试验代码,可用来代替单片机的工作对串口进行测试。-VHDL language used hardware realize the serial communication of test code that can be used to replace the work of single-chip serial port for testing.
SPI_verilog_vhdl
- SPI串口的内核实现(分别使用verilog和vhdl语言描述的)-The core of the realization of SPI serial port (using Verilog and VHDL language descr iption of the)
uart
- VHDL语言编写的全功能串口模块(包含DTR,RTS等管脚),在CPLD器件上测试通过-VHDL language, full-featured serial modules (including DTR, RTS pin, etc.), in the CPLD device test
VerilogHDL_code
- 几个常用的接口实验的程序代码,用Verilog HDL语言编写的,包括七段数码管、拨码开关、蜂鸣器、矩阵键盘、串口、I2C、跑马灯等。-Some commonly used experimental procedures for the interface code, using Verilog HDL language, including Seven-Segment LED, DIP switch, buzzer, matrix k
serial
- 利用VHDL语言编写的串口程序,可以在Quartus2环境下编译下载-Use the serial language VHDL program can be compiled in an environment Quartus2 Download
87361001Uart2
- VHDL语言编写的UART串口通讯,2400Hz的波特率时钟-VHDL language UART serial communication, 2400Hz clock of baud rate
UART2_vhdl
- 这是VHDL语言的uart串口驱动 感觉很难写的 但是这个可以移植的 比较好-This is the VHDL language serial uart driver feel it is very difficult but this can be written by transplantation is better huh
uart
- 串口通讯 PC发送FPGA接受后回传 verilog语言-uart verilog
UART
- 本人自己编写的FPGA异步串口通信模块(UART),基于QuartusII环境,verilog语言编写,包含仿真和全部程序及说明,验证通过,具有很好的稳定性和参考价值!-I have written of the FPGA asynchronous serial communication module (UART), based on QuartusII the environment, verilog language, inclu
uart
- vhdl语言的串口发送/接收模块,本人用在多个工程,很好用。-vhdl language of the serial transmit/receive module, I used a number of projects, very good use.
tt
- QUARTUS环境下的串口实现调试通过可使用(Serial port implementation in QUARTUS environment)