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可显示动感图像的点阵
- 此为用VHDL编写的可实现动感图像的点阵，做于05年2月，显示BUPT并有飞鸟图像显示-prepared for the use of VHDL can achieve dynamic lattice images, in the same February 05, showing WCDMA and birds Image Display
muxplusii --vhdl 经典程序
- 用VHDL编写的数字时钟,可变宽度脉冲产生器-prepared using VHDL digital clock, Variable width pulse generator, etc.
chengxu(vhdl)
- 这是用VHDL编写的FPGA与计算机进行串口通信的程序和一个LED程序-VHDL and FPGA prepared by the computer serial communication procedures and an LED procedures
fenpin(vhdl)
- 使用VHDL编写的分频程序,能进行任意次的偶数分频,程序简单易懂,供 初学者参考-prepared by the use of VHDL-frequency procedures can make even the random frequency, the procedures are simple and easy to understand. reference for beginners
decoder(vhdl)
- 这是用VHDL编写的译码程序,程序简单易懂-VHDL prepared decoding procedures that are simple to understand
VHDL编写的walsh码产生程序
- VHDL语言编写的产生walsh码程序.
串口通讯VHDL源码
- 采用VHDL编写的串口通信。
verilog vhdl编写的串并转换
- verilog vhdl编写的串并转换
KEYBOARD_DEC-vhdl
- maxplus2为开发环境 vhdl编写的 键盘 程序-maxplus2 VHDL development environment for the preparation of the keyboard procedures
一个简单的UART
- 采用VHDL编写的一个简单的UART-using VHDL prepared a simple UART
muxplusii --vhdl 经典程序
- 用VHDL编写的数字时钟,可变宽度脉冲产生器-prepared using VHDL digital clock, Variable width pulse generator, etc.
chengxu(vhdl)
- 这是用VHDL编写的FPGA与计算机进行串口通信的程序和一个LED程序-VHDL and FPGA prepared by the computer serial communication procedures and an LED procedures
decoder(vhdl)
- 这是用VHDL编写的译码程序,程序简单易懂-VHDL prepared decoding procedures that are simple to understand
uart-verilog-vhdl
- 拿verilog和vhdl编写的串口通信代码(可综合)-with vhdl and verilog prepared by the serial communication code (synthesis)
ref-ddr-sdram-vhdl
- 基于VHDL编写的DDR-SDRAM控制器的编程，目前是业界常用的RAM控制器-VHDL prepared based on the DDR-SDRAM controller programming, is currently the industry s commonly used RAM controller
ref-sdr-sdram-vhdl
- 基于VHDL编写的SDR-SDRAM控制器的编程，目前是业界常用的RAM控制器-VHDL prepared based on the SDR-SDRAM controller programming, is now commonly used in industry RAM controller
interleaver-vhdl
- VHDL编写的基于FPGA的4-8交织器代码，有需要的下来-4-8 prepared VHDL code interleaver
vhdl
- VHDL编写的例程，一般常见的运用里面都包含了。该程序对于VHDL的前期学习者有很大的帮助-VHDL routines prepared, use common contain it. The program for the early stage of VHDL great help learners
counter6_t10jia
- 这是一个用VHDL编写的十进制计数器程序通过编译-This is a work written in decimal counter VHDL
cpu_VHDL
- vhdl 编写的cpu 代码, 详细说明了各个部分的功能及所有对应的代码，对cpu架构的学习和vhdl 编程有很大帮助(vhdl code for simple CPU)