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串口verilog源代码
- 串口UARTverilog源代码。包括控制模块、收、发模块。程序全，功能简洁，包含Q2工程
fpga与PC机的串口通信
- 基于VerilogHDL 的FPGA与PC的串口通信代码，已经测试过，绝对可以用
串口通信收发模块
- verilog编写的串口通信的接收模块和发送模块，经过仿真有效
cuart
- verilog编写的全功能串口-verilog programme of serial port
标准的串口通讯设计VHDL
- 标准的异步串口通讯设计程序——基于VHDL编程-communication design programme of standard asynchronous serial port base on VHDL programme
uartok
- 采用verilog编写的串口通信程序，采用了状态机设计！程序简单，消耗资源少-Serial communication written by verilog hdl. It is designed with FSM. The program is simple,and consume resource is few.
SPI串口的内核实现spicore
- SPI串口的内核实现spicore SPI串口的内核实现spicore-SPI string mouth essence realizes spicore the SPI string mouth essence to realize spicore the SPI string mouth essence to realize spicore
uart_verilog_v1
- uart d的verilog 程序，可以实现普通串口功能-UART d Verilog procedures can be achieved ordinary serial port function
Uart_TR
- Verilog编写的简单异步串口 完全原创，站长请查看内容-Verilog prepared by the simple asynchronous serial completely original, the station can be accessed content
uart-verilog-vhdl
- 拿verilog和vhdl编写的串口通信代码(可综合)-with vhdl and verilog prepared by the serial communication code (synthesis)
VHDL_to_UART
- 用VHDL编写的串口通讯程序，包括几个不同的程序例子，也可以用verilog进行改写。
uart_verilog
- 简化的串口通信，去掉了奇偶校验位，波特率为9600，测试通过，fpga型号为xinlinx vp20-Simplified serial communication, removing the parity bit, the baud rate to 9600, test, fpga model xinlinx vp20
RS232(verilog)
- 串口RS232通信程序，包括对串口通信原理的说明。-RS232 serial communication program, including a descr iption of the principles of serial communication.
基于FPGA的串口通信系统
- 该设计是基于 FPGA 的串口通信系统模拟仿真，通过对 RS-232 串行总线 接口的设计，掌握发送与接收电路的基本思路，并进行串口通信。采用 Verilog HDL 语言对 UART 波特率产生模块、数据发送模块、接收模块进行硬件描述， 再将其整合为一个 RS-232 收发模块，最终在顶层模块中将两个 RS-232 模块例 化，实现两块 FPGA 芯片全双工通信的设计。(Design of serial communication s
LAB9_UART
- Verilog串口收发的程序及说明。。。。。。(Verilog rx_uart r_uart x_uart)
串口通讯
- EP208Q8F17C8芯片的串口通讯程序(uart communication verilog code)
eetop.cn_串口Verilog程序(已验证)
- 基于Verilog编写的串口通信协议模块(Serial communication protocol module based on Verilog)
verilog串口通信程序
- 串口通信程序，用于fpga的串口收发，并讲解了串口通信原理。(Serial communication program is used to receive and transmit the serial port of FPGA, and the principle of serial communication is explained.)
Uart-Verilog
- verilog实现串口通讯，包括verilog代码和testbench代码(verilog serial communication, including the verilog code and testbench Code)
基于FPGA与PC串口自收发通信-Verilog
- 基于FPGA与PC串口自收发通信-Verilog(Self-transceiving Communication Based on FPGA and PC Serial Port-Verilog)