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turbo-interleaver
- 基于FPGA的Turbo码交织器的设计与实现 比较实用
FPGA上实现TURBO码的编码
- 在赛灵思的FPGA上实现的TURBO码的编码程序
turbo[1].tar
- turbo码的verilog程序，有意者请下载。-turbo code verilog procedures Interested parties please download.
turbo-interleaver
- 基于FPGA的Turbo码交织器的设计与实现 比较实用-FPGA-Based Turbo Code Interleaver Design and Implementation of a more practical
RSC
- Turbo码编码器的两个分量编码器RSC，主要由四个移位寄存器和两个模2加法器组成-Turbo code encoder of the two component encoders RSC, mainly by the four shift register and the two-mode adder composed of 2
cocahome_20100403094552
- 实现基于FPGA的turbo码的编解码matlab代码-FPGA implementation of turbo codes based codec matlab code
TurboSimu
- Turbo码编码译码器的研究及其FPGA实现.sdf -Turbo
turbo_encoder
- 在赛灵思的FPGA上实现turbo码的编码程序,使用Verilog语言实现。-Implemented on Xilinx FPGA in the turbo coding principle, the use of Verilog language.
FPGA_Turbo
- 用FPGA实现turbo码的编写,对于初学者非常方便-how to use fpga to complete turbo，it is very useful for us
1
- 基于FPGA的改进turbo码译码器的设计与实现-FPGA-based turbo decoder to improve the design and implementation
FPGA_Turbo
- Turbo码编解码的FPGA实现，verilog语言编写-Implementation ofTurbo code on FPGA , using Verilog language
Apply-of-turbo-code-in-LTE.rar
- turbo码在LTE中的实现，并在fpga中得到了实现,turbo code in LTE implementations, and have been achieved in fpga
myTurbo_test
- Turbo编码的FPGA实现，采用了（7，5）RSC编码和循环移位交织，帧长度128bit(The FPGA implementation of Turbo coding adopts (7, 5) RSC coding and cyclic shift interleaving, and the fr a me length is 128bit.)
Turbo_VHDL
- 使用了Sova译码算法，实现的基于FPGA的Turbo码译码算法。( U4F7F u7528 u4B01 u7B1 u7B1 u7B1 u7801 u7B97 u6CD5 uFF0C u5B9E u73B0 u7684 u57FA u4E8EFPGA u7684Turbo u7801 u8BD1 u7801 u7B97 u6CD5 u3002)