搜索资源列表
三态树
- 三态树：一个树控件的派生控件，完成item的三种状态-Tri-state tree: A tree control derivative controls, the three states to complete item
tri_state
- EDA 双向端口的输入输出程序 快点来下在啊 -EDA port bi-directional input and output procedures to hurry up in the ah
VHDL
- 注1： 含有不可综合语句，请自行修改 注2： 一些PLD只允许I/O口对外三态，不支持内部三态，使用时要注意 注3: 设计RAM的最好方法是利用器件厂家提供的软件自动生成RAM元件，并在VHDL程序中例化 -Note 1: contains a comprehensive statement can not, please amend Note 2: Some PLD only permit I/O port o
MutiTree
- 三态选择树形控件，做了改进 三态选择树形控件，做了改进-Three-state select tree control, made a choice to improve the tri-state tree control, have made improvements
vc_treecode
- 一段很好的三态树代码，是用vc++开发的，要用三态树的朋友可以下载-For some very good code tri-state tree, is vc++ Developed to use three-state friend of the tree can be downloaded
DATAOUT
- 一段很好的三态树代码，有需要的朋友可以下载看看哦 -For some good tri-state tree code, there is a need to see if friends can download Oh
shuzidianzi
- 数字电子课程设计报告,题目一:三态逻辑电平测试器电路的设计 题目二:分压式工作点稳定电路Multisim仿真 内附详细的设计原理及原理图-Digital Electronic curriculum design report entitled One: tri-state logic level circuit design of the test subject II: working pressure points stab
sp487
- The SP486 and SP487 are low–power quad differential line drivers meeting RS-485 and RS-422 standards. The SP486 features a common driver enable control the SP487 provides independent driver enable controls for each p
MutiTree
- VC++在treectrl控件中实现三态树的选择，是个经典的程序。-VC++ at implementation treectrl tri-state control of the selection tree is a classic procedure.
GPIO
- GPIO (General Purpose Input and Output ports) with microprocessor programmable tri-state bus interface-Use verilog to design a 48 control points that can be programmed to input or output controller
0809chengxu
- AD0809程序，ADC0809 是8 位逐次逼近型A/D转换器。它由一个8路模拟开关、一个地址锁存译码 器、一个A/D 转换器和一个三态输出锁存器组成（见图1）。多路开关可选通8个模拟通道， 允许8 路模拟量分时输入，共用A/D 转换器进行转换。三态输出锁器用于锁存A/D 转换完 的数字量，当OE 端为高电平时，才可以从三态输出锁存器取走转换完的数据。-AD0809 procedures, ADC0809 is
cmd_state
- vhdl的三态门的实现！双向的输入输出！-vhdl doors of the tri-state to achieve! Two-way input and output!
honggongneng
- 是用quartus的调用宏功能！方便快捷-vhdl doors of the tri-state to achieve! Two-way input and output!
tristate
- VHDL code for a full adder and n bit full adder a tri state buffer and a flip flop
ethernet
- ：提出了一种基于FPGA 实现嵌入式三态(10MB/100MB/1 000MB)以太网的设计方案，分别从硬件和软件方面介绍了使用FPGA 进 行嵌入式系统设计的方法，编写了一个控制系统进行10MB/100MB/1000MB 自切换程序，并在工程中得以实现。-: This paper presents a FPGA-based Embedded Tri-State (10MB/100MB/1 000MB) Ethernet desig
InterefacingPS2Keyboard
- FPGA/keyboard interface is shown in figure 1. When the FPGA “reads” the Data or Clock inputs both PS2Data_out and PS2Clk_out are kept low which puts the tri-state buffers in high impedance mode. When the FPGA "writes
FBWFApp_2005
- 类似三态树型控件，附有选择框，能完整显示磁盘文件树。不是简单的事例，而是真正地实现了列举系统中所有磁盘的文件，而且详细利用递归算法提取了当前选中的文件。非常值得研究。-Similar to the tri-state tree control, with a selection box that can display full disk file tree. Is not a simple case, but really the s
circuit_concept
- 介绍软件驱动开发中经常使用的几个电路概念，比如三态门，高阻-Describes the software-driven development often use the concept of a few circuits, such as the tri-state gate, high resistance, etc.
Three-state-bidirectional-drive
- 这是三态双向驱动器的Verilog源程序，已经编译通过，可以直接使用-This is a tri-state bi-directional drive the Verilog source code, has been compiled by, can be used directly
tri-state-bidirectional-bus
- FPGA中三态双向总线的实现。以一个实 际工程中的程序来详细介绍三态双向总线实现及应用。-Implementation of FPGA in the tri-state bidirectional bus