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sdram_mdl
- 基于FPGA的SDRAM控制硬件源代码程序，-FPGA-based SDRAM controller hardware source code program,
sdram_mdl
- 基于FPGA设计SDRAM 读写试验,用途:显示卡缓冲.大型显示器驱动设计方案必选方案-SDRAM read and write tests based on FPGA design, use: display card buffer. Large display driver design alternatives will be
sdram_mdl
- verilog编写的对SDRAM的控制的源代码，开发FPGA/CPLD-verilog SDRAM write control of the source code, development FPGA/CPLD
sdram_mdl
- ram代码的编写和使用 -ram ram code development and use of the preparation and use of the code
sdram_mdl
- verilog实现SDRAM控制器，quartus工程-verilog SDRAM controller, quartus project
sdram_mdl
- SDRAM的FPGA 工程。用Verilog编写。器件型号为K4S641632，经过实验板验证，绝对可用。-SDRAM FPGA project. Written in Verilog. Device model K4S641632, after the experimental board, absolutely available.
sdram_mdl
- FPGA控制SDRAM的工程，是用Verilog写的，很好用-FPGA to control the SDRAM project is written in Verilog, easy to use
sdram_mdl
- FPGA 控制SDRAM读写，通过按键控制读写操作，读出之后发送到串口显示到电脑终端。-FPGA to control the SDRAM read and write, read and write operations by the key control to read out is sent to the serial port to display to the computer terminal.
sdram_mdl
- SDRAM的verilog程序控制模块，希望对大家有帮助-SDRAM verilog program control module, we want to help
sdram_mdl
- FPGA控制SDRAM程序，包括初始化、读写-SDRAM Initial and Read Write
sdram_mdl
- 用Verilog HDL编写的SDRAM控制程序，在DE2-70上测试通过，有很大的参考价值。-SDRAM control program written using Verilog HDL DE2-70 test passes, great reference value.
sdram_mdl
- SDRAM VERILOG源代码 控制读写-SDRAM VERILOG source code control read and write
sdram_mdl
- 特权同学的sdram读写代码，适合初学者学习，注释很详细。-Sdram of privileged students to read and write code, suitable for beginners to learn, very detailed notes.
sdram_mdl
- 基于verilog的SDRAM读写控制,源自特权同学-SDRAM controller use to read or write base on verilog，it is from teqian
sdram_mdl
- 关于RS232串口调试中接收和发送的控制模块部分的程序-About the RS232 serial port receive and transmit debugging control module part of the program
sdram_mdl
- 基于SDRAM的读写调试试验，使用verilog语言编写，经过调试。-SDRAM-based literacy commissioning tests, using verilog language, through debugging.