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mii接口
- 以太网知识MII接口：本文主要分析MII/RMII/SMII，以及GMII/RGMII/SGMII接口的信号定义，及相关知识，同时本文也对RJ-45接口进行了总结，分析了在10/100模式下和1000M模式下的设计方法。
macmiim
- 一个关于以太网MAC核和介质无关接口的原代码,希望对大家有帮助!-an Ethernet MAC on the nuclear medium and unrelated to the original interface code, we want to help!
RGMII_video_shiftregs
- 通过verilog编程，实现利用rgmii接口进行高速视频信号传输。-By verilog programming, high-speed video using rgmii interface signal transmission.
ethernet_tri_mode
- The code of MAC on Verilog from internet
ETH_TEST
- 这是以太网RGMII接口程序，供给新人理解网络接口数据通信实现的过程，RJ45->PHY->RGMII->协议解析这个数据流过程-The Ethernet RGMII interface program, supply a new understanding of the process of implementation of the network interface data communication, RJ4
ethernet-rgmii
- This file is part of the OCTEON SDK driver for Linux.
rgmii
- Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
ethernet_interface
- 介绍以太网的接口MII, R GMII, GMII基础知识。-The Ethernet interface MII, RMII, RGMII, GMII basics.
DE2_115_WEB_SERVER_MII_ENET0
- Simple HTTP server using sockets interface of NicheStack TCP/IP and NIOS II SCPU to serve HTML, JPEG, GIF PNG, JS, CSS, SWF, content using RGMII on DE2-115 board
rgmii
- Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
rgmii.tar
- 以太网接口中的rgmii接口，FPGA VHDL源码-Ethernet interfaces rgmii interfaces, FPGA VHDL source code
DE2_115_WEB_SERVER_RGMII_ENET0
- DE2_115_WEB_SERVER_RGMII_ENET0千兆以太网,ALTERA公司DE2板网络通信，实现PC机控制板子LED级数码管/LCD屏显示（RGMII）-DE2_115_WEB_SERVER_RGMII_ENET0:Gigabit Ethernet, ALTERA DE2 board network communications company, to achieve control of the PC board lev
rgmii
- Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
cvmx-helper-rgmii
- Functions for RGMII GMII MII initialization, configuration, and monitoring.
CH03_RGMII_UDP_TEST
- 基于RGMII的UDP网络数据通信，学习FPGA的千兆以太网通信(RGMII based UDP network data communication, learning FPGA Gigabit Ethernet communications)
RGMII_RECEIVER
- This module converts 4 bit DDR RGMII flow to 8 bit SDR flow, proved on Altera Cyclone 3 devices.
RGMII_TRANSMITTER
- This module converts 8 bit SDR flow to 4 bit DDR RGMII flow, proved on Altera Cyclone 3 devices.
9_ethernet_1g_100M
- 基于Xilinx的Artix7实现千兆以太网的RGMII接口通信(RGMII interface communication for Gigabit Ethernet based on Xilinx Artix7)
DBSTAR_RGMII
- Verilog实现的RGMII和GMII接口转接，适合适配不同PHY芯片接口使用(Verilog implementation of RGMII and GMII interface transfer)
rgmii_image
- 通过RGMII协议驱动的PHY芯片完成千兆以太网收发，包括ARP响应(With RGMII driving PHY IC to finish the internet communication)