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Quartus9.0crackfile
- 这是最新版的Quartus9.的破解文件，怎么做我就不说了，里面说的很清楚，我已经尝试，保证能用！希望大家学习愉快！-This is the latest version of Quartus9.' s Crack file, how do I do not say, which says very clearly, I have tried to ensure that can be! Hope that we learn wi
ad7823.vhd
- ad7823的VHDL驱动程序，测试在quartus9.0下编译通过-ad7823 driver of VHDL, the compiler under test through quartus9.0
oc_i2c_master_top_v92
- I2C IP for Quartus V9.0 sp2, can used in SOPC builder.
Crack_QII90
- quartus9.0破解器，能够破解quartus9.0-quartus crack
nios2sdram
- 使用Nios II测试SDRAM的完整工程。下载修改器件及引脚分配编译后可直接运行。使用quartus9.1+NiosII9.1-SDRAM using the Nios II tests the integrity of works. Download the change device and pin assignment can be directly compiled to run. Use quartus9.1+ NiosII
quartus9.1
- 9.1版本破解！ 9.1版本破解！ -for quartus 9.1for quartus 9.1for quartus 9.1for quartus 9.1
CDM2.04.16WHQLCertified
- altera quartus 9.0 在win7 64位下的下载器驱动-altera quartus 9.0 usb_byteblaster_driver in window7 64
NameSeqDet
- 数字电路设计nameseqdet build in Quartus9.1-nameseqdet build in Quartus9.1
WBUart
- Verilog实现的Uart模块，在quartus9.1环境下已综合、运行成功。-Verilog implementation Uart module has been integrated in the quartus9.1 environment, run successfully.
QuartusP9.1-hack
- quartus9.1正式版的破解软件，操作简便-quartus9.1 the official version of the cracked software,
quartus
- 本代码利用SOPC实现走马灯功能，在QUARTUS9.0，NIOSII9.0环境下开发。-Using SOPC implementation of the code features a revolving door in QUARTUS9.0, NIOSII9.0 development environment.
dct_verilog
- 用FPGA实现dct变换。verilog语言实现，在quartus9.0中验证，含整个工程-dct transform verilog language in quartus9.0 verify, with the entire project
IIR_2
- IIR二阶节的直接型实现,Quartus9.1编译通过。-Direct form of IIR SOS
f_measure_3
- 示波器源程序，由quartus9.1编写，verilog语言支持。采样频率为1M等效采样速率可以到200M-Oscilloscope source code, written by the quartus9.1, verilog language support. Sampling frequency of 1M to 200M equivalent sampling rate can
spi_wangxiaozhao
- 使用fapga EP2C8Q208C8编写的的SPI程序环境quartus9.0-Use fapga EP2C8Q208C8 write their own SPI environment quartus9.0
QuatersCrack
- 可以用于破解Quartus II 9.0,9.0SP2,9.1。 内部已经有说明文档。-Cracker for Quartus II 9.0,9.0SP2,9.1. Notice the readme file in it.
booth_mul
- 流水式BOOTH乘法器，包含整个工程文件，用Quartus9编写打开。为8bit乘以8bit乘法器-Flow BOOTH multiplier, contains the entire project file, open with Quartus9 written. Multiplied for 8bit 8bit multiplier
Develop-a-Verilog-module-for-a-2
- 基于QUARTUS9.1 的 程序 例程用于 CYCLONE II ep2c5t144 开发板测试-guangyuQUARTUS de licheng yongyuceshi CYCLONE II ep2c5t144 board
costable.zip
- cos_table主要应用在GPS接收机中，通过quartus9.1 的编程实现，控制接收的程序,cos_table main application in the GPS receiver, through the programming of the quartus9.1 implementation, control the received program
full_license
- quartus9.0 全功能license(quartus9.0 full license)