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Project_2
- 银行排队的数学模型的实现 问题： n银行有n个窗口对外营业，每个窗口一次只能接待一个客户 n客户的到达时间和处理业务的时间不同（可随机产生） n利用链表队列模拟总的处理过程和处理时间 n假设 n不允许插队，不同客户的交接时间忽略不计 策略I: 策略 客户先选择无人窗口办理 如果没有，就选择人数最少的窗口排队 讨论 人数最少未
Project_2
- 银行排队的数学模型的实现 问题： n银行有n个窗口对外营业，每个窗口一次只能接待一个客户 n客户的到达时间和处理业务的时间不同（可随机产生） n利用链表队列模拟总的处理过程和处理时间 n假设 n不允许插队，不同客户的交接时间忽略不计 策略I: 策略 客户先选择无人窗口办理 如果没有，就选择人数最少的窗口排队 讨论 人数最少未
Project_2
- project of image proccessing
Project_2
- 8PSK Modulation and Demodulation
project_2
- this project source code is of a website that is useful for adding news events calender appoingment can be viewed later by the user. this project is made using asp, easy-to-use and setup, the source code is wonderful.
Project_2
- project 2 using mc9s12xs128
Project_2
- XS128单片机与无线模块的发送与接收程序，单片机使用模拟IO口进行数据通信。-XS128 microcontroller and wireless modules to send and receive program, microcontroller with analog IO ports for data communications.
Project_2
- 学生综合业务管理系统，这个系统主要是用jsp/servlet技术实现的，大部分功能都实现了，部分还有缺陷，有待改进。-Students in integrated business management system, this system was used in jsp/servlet technology, and most functions are fulfilled, there is some defect, be imp
Project_2
- 基于飞思卡尔单片机的c语言程序：电子表（精确到秒）-Based on microcontroller freescale c programming language: watch (accurate to seconds)
Project_2
- 基于双传感器的电磁组智能车的纯舵机控制程序。-Based on the dual sensor electromagnetic group plain smart car steering gear control program.
project_2
- 用户界面的ARP数据包的捕获，基于winpcap和MFC开发-Capturing user interface ARP packet based winpcap and the MFC
Project_2
- Matlab _ MIMO + QPSK + ML/MMSE/ZF 在Matlab的平台上,应用QPSK调制,以及3种不同的探测方法,实现并模拟了2x2的MIMO功能.-Matlab _ MIMO+ QPSK+ ML/MMSE/ZF on the Matlab platform, application QPSK modulation, as well as three different detection methods, an
Project_2
- 针对mc9xs128单片机的摄像头处理程序，并进行了完美滤波。使用codewarrior打开查看-In view of the camera handler Mc9xs128 single-chip microcomputer, and a perfect filter was carried out.Using the codewarrior open view
project_2
- 实现了基于FPGA的FFT变换，从最基本的32位2进制浮点数加减乘运算模块开始，组装出FFT模块。同时仿真文件中有32位浮点数转换为实数的仿真模块便于调试-Realized FPGA-based FFT transform, starting with the most basic 32-bit binary floating-point addition and subtraction multiplication module, a
project_2
- simple gates using ip integrator from xilinx
project_2
- 使用Verilog完成椭圆曲线的取整运算操作(compute curve mod calculation)