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primetime
- 这是ＶＨＤＬ语言编写的延时测试程序，用来测定ＣＰＬＤ的性能指标-This is the VHDL language delay the test procedure used to determine the performance CPLD
primetime
- 这是ＶＨＤＬ语言编写的延时测试程序，用来测定ＣＰＬＤ的性能指标-This is the VHDL language delay the test procedure used to determine the performance CPLD
PrimeTime_STA
- PrimeTime Intro to STA -PrimeTime Intro to STA
Advanced.ASIC.Chip.Synthesis.Using.Synopsys.Design
- 使用synopsys design compiler和 prime time进行Asic开发的英文pdf-Advanced.ASIC.Chip.Synthesis.Using.Synopsys.Design.Compiler.Physical.Compiler.And.Primetime
wlli
- good material about Static Timing Analysis primetime and Formal verificationformality
my-favorite-dc-primetime-tcl-tricks
- 静态时序分析工具，比较好的文档资料，看看就知道比较好-sta training
ASIC-SYNOPSYS
- 芯片设计综合经典书籍 design compiler primetime-asic synthesys
PrimeTime_Advanced_Timing_Analysis_User_Guide
- PrimeTime Advanced Timing Analysis User Guide
DClicense_Install_crack_tool
- synopsys 公司Design compiler的安装步骤及license生成工具-Installation of the Design compiler,Synopsys and the neccesary tools for license crack and generate
pt_fundamentals_ug
- 文献包含PT的时序分析方法说明： PrimeTime is a full-chip, gate-level static timing analysis tool targeted for complex, multimillion-gate designs. It offers an unsurpassed combination of speed, capacity, ease of use, and compatibi
ins_buf_v2.tcl
- a supplemnet of insert_buffer in primetime, support net/load in differenet hierarchy, choose adjacent cells.
PT_1.pdf
- primetime student guide helps to undersatnd the primetime tool