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floatmul
- 采用VERILOG 语言进行设计 实现32位浮点数乘法运算 结果已经验证过 放心使用-Verilog design language used to achieve 32-bit floating-point multiplication results have been verified ease of use
Polynomial-multiplicat
- 多项式相乘运算-Polynomial multiplication operation
Trying-out-PAPR-reduction-for-OFDM-by-multiplicat
- Trying out PAPR reduction for OFDM by multiplication with j