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StateMachine
- 典型的状态机，简单的状态机可以不需要编码，也可以采用one-hot编码方式，如果状态很多时，采用格雷码，能有效避免亚稳态。-A typical state machine, a simple state machine can do without coding, can also be used one-hot encoding, if the state in many cases, the use of Gray code, ca
are_you_pld_metastable
- cypresss出品的，讲述FPGA 亚稳态 问题的好资料。阐述清晰到位。 -Metastable problem solution by Cypresss
fifo
- 异步fifo的经典讲解，包括亚稳态的产生，同步电路的构造，fifo电路的结构，源代码实现。-Asynchronous fifo on the classic, including the emergence of metastable, the structure of synchronous circuits, fifo circuit structure, the source code to achieve.
setup-hpld
- 本文描述了fpga中的亚稳态时如何产生的，以及如何计算亚稳态的平均无故障时间。对了解亚稳态有帮助。-This paper describes the sub-fpga how the steady state, as well as how to calculate the metastable MTBF. The understanding of metastable helpful.
key_read
- 通过延时检测按键的是否按下，同时消除亚稳态-Detected through the delay button is pressed or while eliminating metastable
FPGA-FIFO
- FPGA-跨时钟域总线信号可靠传输异步FIFO技术安全可靠，格雷码计数，减少亚稳态-FPGA-clock domain crossing bus signals reliable transmission of asynchronous FIFO safe and reliable, Gray code count, reducing the metastable
fifo
- 异步FIFO实现 verilog代码，利用格雷码消除亚稳态-Asynchronous FIFO realize verilog code, Gray code to eliminate the use of metastable
asyn-fifo
- 功能就是一个FIFO，first in first out！避免跨时钟域的亚稳态-Function is a FIFO, first in first out! To avoid the cross clock domain metastable
ASIC_reset_shengna
- 复位问题是ASIC设计中的一个关键问题, 其处理得当与否将直接影响整个电路的性能, 在此本文从多个 角度对同步复位和异步复位进行了讨论和分析, 并且比较了各自的优缺点, 重点针对异步复位过程中存 在的亚稳态问题采用两级复位同步和复位分配缓冲树的方法进行了相应的解决。-Reset ASIC design problem is a key issue, which handled properly or not will direc
FIFO_ASY
- 异步FIFO，利用格雷码作异步FIFO指针减少亚稳态产生，利用同步寄存器放置亚稳态的级联传播。(Asynchronous FIFO, using gray code for asynchronous FIFO pointer to reduce metastable, cascade propagation using synchronous register placed metastable.)