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CocoSourcesCS
- The Compiler Generator Coco/R Coco/R1 is a compiler generator, which takes an attributed grammar of a source language and generates a scanner and a parser for this language. The scanner works as a deterministic fin
ripple-lookahead-carryselect-adder
- Ripple Adder: 16-bit 全加,半加及ripple adder的设计及VHDL程序 Carry Look ahead Adder:4, 16, 32 bits 前置进位加法器的设计方案及VHDL程序 Carry Select Adder:16 Bits 进位选择加法器的设计方案及VHDL程序-Ripple Adder : 16-bit full adder, semi-Canada and the ripple
cla_dc
- a demo scr ipt of \"carry lookahead adder\" for synopsys design compiler
cla_src
- carry lookahead adder verilog program
数控
- 一个数控机床的切割模拟程序。有多种模拟方式。如逐点比较，直线插补等。很好用。内附可执行程序。-a CNC cutting simulation program. A number of simulation. If a case-by-point comparison, such as linear interpolation. Very good use. Enclosing executable.
CocoSourcesCS
- The Compiler Generator Coco/R Coco/R1 is a compiler generator, which takes an attributed grammar of a source language and generates a scanner and a parser for this language. The scanner works as a deterministic fin
ripple-lookahead-carryselect-adder
- Ripple Adder: 16-bit 全加,半加及ripple adder的设计及VHDL程序 Carry Look ahead Adder:4, 16, 32 bits 前置进位加法器的设计方案及VHDL程序 Carry Select Adder:16 Bits 进位选择加法器的设计方案及VHDL程序-Ripple Adder : 16-bit full adder, semi-Canada and the ripple
Ripple
- VC编写的演示水波算法的例子程序，超好！-VC prepared Shuibo algorithm demo program example, super good!
cla_dc
- a demo scr ipt of "carry lookahead adder" for synopsys design compiler
cla_src
- carry lookahead adder verilog program
lookahead
- implement of carry look ahead adder vith verilog
adder
- 本设计是做了一个32位超前进位加法器，能够快速计算-This design is made of a 32-bit lookahead adder, to quickly calculate
CLAA_32_BITS
- A 32-bit carry lookahead adder
cccc
- 介绍了在执行G代码的运动控制中,对G代码 数控程序的解析、处理,并设计了一种针对高速高精度运动控制的Lookahead 功能的算法-Introduced in the implementation of motion control in the G code, G code NC programs on the analysis, processing, and designed a high-precision motion c
cla16
- 16位超前进位加法器的源代码，整个工程文件都有，是在ISE10.1下建立的，可以帮助理解超前进位原理（对了，是Verilog的，因为上面没看到只好选VHDL了）-16-bit look-ahead adder the source code files have the whole project was established under the ISE10.1 to help understand the lookahead pri
VHDL-ripple-lookahead-carryselect-adder
- vhdl code for ripple carry adder, carry select adder and carry look ahead adder
Lookahead-adder
- 超前进位加法器，可以实现提前实现进位，加速算法。-Lookahead adder
lookahead-adder
- Quartus环境下的超前进位加法器的编写代码，适合初学数字逻辑设计的学习-Lookahead adder in Quartus
four-lookahead-adder
- verilog_HDL-四位超前进位加法器,学习资料，可以方便的用-verilog_HDL-four lookahead adder, learning materials, you can easily use
32-bit Carry lookahead adder
- 32-bit Carry lookahead adder generic verilog