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Enable floating SIP control in IPAQ_Windows CE .NE
- 这文章授予您要诀关于怎样有浮动SIP 控制在您的口袋PC/Windows CE NET 设备里。同时, 您有学会关于怎样对做软的重新设置(没有按任何个按钮) 在您的设备。-This article gives you tips on how to control the floating SIP in your pocket PC / Windows CE NET equipment Lane. Meanwhile, you have
Floating-point-complex-radix-2-decimation-in-time-
- 浮点复数基2时分FFT完成适当的FFT，输出改写输入缓冲器。-floating-point complex FFT-based two hours to complete the FFT output rewritten input buffer.
Fast Floating-Point Arithmetic Emulation on the Bl
- ADI BF 16位定点DSP的快速浮点仿真的汇编代码-ADI BF 16-bit fixed point DSP fast floating point simulation code compilation
MCS51浮点计算程序
- 51单片机浮点数运算子程序及IEEE和51浮点数相互转换程序 -51 floating-point operations and subroutine IEEE floating point and 51 mutual conversion
Fast Floating-Point Arithmetic Emulation on the Bl
- ADI BF 16位定点DSP的快速浮点仿真的汇编代码-ADI BF 16-bit fixed point DSP fast floating point simulation code compilation
flowadd
- verilog编写的32位浮点加法器-32-bit Floating Point Addition Written in Verilog
msp430浮点库slar041
- msp430浮点库,浮点运算很好的例子!-Controller floating point libraries, floating-point operations a good example!
51单片机汇编葵花宝典
- 各种51单片机源程序集，包括浮点数的计算，多字节的加减等算法的实现-SCM source scr ipts, including floating point calculations, multi-byte such as addition and subtraction algorithm implementation
tabctrl
- 这代码是将Tab Ctrl添加到浮动窗口。-This code is added to the Tab Ctrl floating window.
Enable floating SIP control in IPAQ_Windows CE .NE
- 这文章授予您要诀关于怎样有浮动SIP 控制在您的口袋PC/Windows CE NET 设备里。同时, 您有学会关于怎样对做软的重新设置(没有按任何个按钮) 在您的设备。-This article gives you tips on how to control the floating SIP in your pocket PC/Windows CE NET equipment Lane. Meanwhile, you have to
vhdldesign
- 浮点加法器的VHDL算法设计 浮点加法器的VHDL算法设计-floating point adder VHDL algorithm design of the floating point adder VHDL Design Algorithm
Floating-point-complex-radix-2-decimation-in-time-
- 浮点复数基2时分FFT完成适当的FFT，输出改写输入缓冲器。-floating-point complex FFT-based two hours to complete the FFT output rewritten input buffer.
fpu
- 利用FPGA实现浮点运算的verilog代码 希望能够给需要做这方面研究的同仁有所帮助-use FPGA floating-point operations verilog code hope to be able to do this to the need for research in the Tongren help
03_Quantization
- This lab exercise will introduce you to AccelDSP’s floating- to fixed-point conversion features. AccelDSP will automatically generate a fixed-point representation of a floating-point design. This process is controllable
dsp-fixed-point-computation
- 该文档主要讲述dsp芯片中进行定点运算所设计的基本问题，分别介绍了定标、从浮点到定点的运算，定点的快速运算及其实现。文档中举出大量的例子说明，相信下载阅读后肯定会很有收获。-the document focuses on the dsp chip sentinel operation designed the basic problem introduced calibration, from floating-point to fix
ieee_matrix
- 用汇编写的矩阵乘法和IEEE浮点数转换 -was compiled using the matrix multiplication and IEEE floating point conversion
floating-point-adder1
- 基于VHDL语言的32位单精度的浮点加法器-floating point adder based on VHDL
Floating-Point-Adder
- 浮点数加法器IP核的vhd设计。浮点数加法运算是运输中使用最高的运算，结合vhdl和EPGA可编程技术，完成具有5线级流水线结构、符合IEEE 754浮点标准、可参数化为单、双精度的浮点数加法器。-Floating point adder design IP core vhd. Floating-point addition operation is used in most transport operations, combined
floating-point-adder
- verilog implementation of the floating point adder
floating-point-multiplier
- verilog implementation of the floating point multiplier