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even_odd
- VHDL实现的奇偶校验功能模块和一个外设配置寄存器的设计实例。
even_odd
- VHDL实现的奇偶校验功能模块和一个外设配置寄存器的设计实例。-VHDL achieved parity peripheral function modules and a design example of the configuration register.
even_odd
- Programs that reads numbers from a file and outputs 2 files. One with odd numbers and one with even.
even_odd
- TO check whether the input number is odd or even