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djdplj
- 运用等精度测量原理,结合单片机技术设计了一种数字式频率计,由干采用了屏蔽驱动电路及数字均值滤波等技术措施,因而能在较宽的频率范围和幅度范围内对频率、周期、脉宽、占空比等参数进行测量并可通过调整闸门时间预置测量精度。-The use of other precision measuring principle in combination with single chip technology to design a digital fr
VHDL-djdplj
- 基于VHDL语言的十进制等精度频率计的设计,采用VHDL语言,运用自顶向下的设计思想, 将系统按功能逐层分割的层次化设计方法,使用Quartus8.0开发环境,实现了频率计的设计。-VHDL language based on the decimal precision frequency meter, etc. The design, using VHDL language, the use of top-down design,
djdplj
- 等精度频率计测量 输入标准频率信号和输入信号,在闸门时间内对其进行测量-And other precision frequency standards for measuring the input frequency signal and the input signal, the gate time to measure its