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COUNT60
- 用VHDL编写的关于counter的控制转换程序，希望大家喜欢，也可以学学哟！-VHDL, on the counter control switching procedures in the hope that everyone likes, but also can learn yo!
COUNT60.20
- 用vhdl语言实现模可变计数器的设计 这是学习VHDL语言的经典例子
COUNT60
- 用VHDL编写的关于counter的控制转换程序，希望大家喜欢，也可以学学哟！-VHDL, on the counter control switching procedures in the hope that everyone likes, but also can learn yo!
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- cnt6.bdf 六进制约翰逊计数器 counters.vhd 不同功能的简单计数器 count60.vhd 60进制计数器 count60.bdf 60进制计数器 counter_1024.vhd 8位二进制计数器 counter_1m.vhd 16位二进制计数器 counter.vhd N进制计数器-M Johnson cnt6.bdf six different functions counters.vh
count60
- 用verilog实现60计数的功能，在制做时钟程序时将用到。本人已经用Quarter9.0运行成功。-Verilog 60 counts with realize the function of making the clock in the program will be used. I have run successfully with Quarter9.0.
count60
- 基于FPGA的VHDL的秒表计时器程序，希望有助于FPGA初学者。 -I down know。
veriloghdl
- 几个Verilong的例子程序，初学者可以用来参考-Several examples of Verilong program for beginners can be used to refer to
COUNT60
- 这是一个用VHDL语言编写的60进制秒计数器。欢迎下载。-This is a VHDL language with 60 decimal seconds counter. Welcome to download.
count60
- 60进制计数器 可以在60个数内计数 并有开始停止功能-60 binary counter can count and 60 the number of start stop function
COUNT60
- 60位进制计数器 可将程序下载后进行60进制表现 并应用于电子表运算-60 binary counter can download the program and after the performance of 60 binary operations used in electronic form
count60
- 基于de2板的数字计时器，使用verilog hdl 语言。很好的新手教程-Based on the the the de2 board digital timer, the use of verilog hdl language. Good newbie tutorial