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TestAsm1
- VC裡面內嵌組合語言 能將組合語言的優點寫在C語言裡面-Inline combinational language in VC. Can build the merit of combinational language in C .
vhdl程序例子
- vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers Sta
LogicGate
- 1. 用面向对象思想描述组合电路； 2. 对给出的输入，计算输出。要求编程实现（C＋＋语言），打印运行结果。 -1. Using object-oriented descr iption of combinational circuit; 2. For a given input, output calculation. Demand programming (C + + language), Print operati
sgsim
- 代码名称：组合逻辑电路仿真器 代码说明：组合逻辑电路仿真器 工具/平台：VC++ 作者：上官晨寰 邮件地址：sgch1982@163.com-code name : combinational logic circuit simulator code : combinational logic circuit simulator tools / platform : VC Author : Sha
Shifters_vhdl
- -- Title : Barrel Shifter (Pure combinational) -- This VHDL design file is an open design you can redistribute it and/or -- modify it and/or implement it after contacting the author -- You can check the draft licen
PLDsheji
- 含有：多时钟系统设计，如何处理建立保持时间，如何处理内部三态电路，消除组合逻辑产生的毛刺，用单片机配置fpga-contain : multi-clock system design, how to deal with the establishment and maintenance of the time, how to handle the internal three-state circuit, Elimination of
VHDL 语言例程集锦
- 包括很多有用的VHDL源代码，如下。文件为PDF格式，可以直接copy你想要的部分，然后粘贴到你自己的VHDL文件中。能帮你节省很多开发时间。 1.Combinational Logic 2.Counters 3.Shift Registers 4.Memory 5.State Machines 6.Registers 7.Systems 8.ADC and DAC 9.Arithmetic
TestAsm1
- VC裡面內嵌組合語言 能將組合語言的優點寫在C語言裡面-Inline combinational language in VC. Can build the merit of combinational language in C .
vhdl程序例子
- vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers Sta
LogicGate
- 1. 用面向对象思想描述组合电路； 2. 对给出的输入，计算输出。要求编程实现（C＋＋语言），打印运行结果。 -1. Using object-oriented descr iption of combinational circuit; 2. For a given input, output calculation. Demand programming (C++ language), Print operating
sgsim
- 代码名称：组合逻辑电路仿真器 代码说明：组合逻辑电路仿真器 工具/平台：VC++ 作者：上官晨寰 邮件地址：sgch1982@163.com-code name : combinational logic circuit simulator code : combinational logic circuit simulator tools/platform : VC Author : Shang
Shifters_vhdl
- -- Title : Barrel Shifter (Pure combinational) -- This VHDL design file is an open design you can redistribute it and/or -- modify it and/or implement it after contacting the author -- You can check the draft licen
work1ADD8
- 组合电路的设计8位加法器设计(ADD8.vhd)-Combinational Circuit Design 8-bit adder design (ADD8.vhd)
DigitalLogic
- 组合逻辑电路、时序逻辑电路及数字逻辑电路系统的设计、安装、测试方法-Combinational logic circuits, sequential logic circuits and digital logic circuit system design, installation, testing methods
the-combinational-logic-circuit
- 关于组合逻辑电路的知识，很好的资料，很全-Knowledge of the combinational logic circuit
Combinational-logic-circuit
- fpga verilog 组合逻辑电路代码仿真及说明-fpga verilog combinational logic circuit simulation code and descr iption
Combinational
- this is a sample of combinational circuit in Verilog and VHDL. such as multiplexer, decoder, adder etc
SV-Combinational-Logic
- system Verilog combinational logic
L5 - Combinational Logic Design with Verilog
- combinational circuits
VHDL codes for Combinational Designs
- VHDL codes for Combinational Designs