搜索资源列表
xljc
- VHDL的序列检测源代码，ATERA平台下编译通过。附详细说明及仿真源代码。-Sequence Detection VHDL source code, ATERA platform compile. Report detailed descr iption and simulation of the source code.
FPGA-SD-COMMUNICATION
- 基于QUARTUSII软件 实现FPGA（ATERA CYCLONE II系列）与SD卡SD模式通信 所用语言位verilog HDL
ofdm
- 正交频分复用的硬件描述语言实现，atera环境
smallkeybaord
- 用verilog写的4*4小键盘按键检测程序。本工程已经编译好。可以直接在Atera DE1 Fpga开发板上运行
altera_up_avalon_ps2
- 花了半个月才改好的Atera DE1/DE2 ps2 IP 驱动核。放在FPGA工程目录下可以直接使用。本IP能够驱动PS/2键盘和鼠标。使用时只要调用HAL目录下的文件即可以直接使用！
FPGA-SD-COMMUNICATION
- 基于QUARTUSII软件 实现FPGA（ATERA CYCLONE II系列）与SD卡SD模式通信 所用语言位verilog HDL-QUARTUSII software implementation based on FPGA (ATERA CYCLONE II series) with SD Card SD mode digital communication language verilog HDL
ofdm
- 正交频分复用的硬件描述语言实现，atera环境-Orthogonal frequency division multiplexing realize the hardware descr iption language, atera environment
smallkeybaord
- 用verilog写的4*4小键盘按键检测程序。本工程已经编译好。可以直接在Atera DE1 Fpga开发板上运行-Written using Verilog 4* 4 keypad keys detection procedures. The project has been compiled. Directly in the development of Atera DE1 Fpga board run
altera_up_avalon_ps2
- 花了半个月才改好的Atera DE1/DE2 ps2 IP 驱动核。放在FPGA工程目录下可以直接使用。本IP能够驱动PS/2键盘和鼠标。使用时只要调用HAL目录下的文件即可以直接使用！-Spent a good two weeks we have made some changes Atera DE1/DE2 ps2 IP-driven nuclear. On the FPGA project directory can be use
EP1C12Q240
- FPGA原理图，ATERA公司的EP1C6Q12，本人设计，供参考-FPGA schematic, ATERA company EP1C6Q12, I design, for reference
QuartusII_Handbook
- 适合atera开发者参考学习的Quartus II 中文版操作手册-Quartus II Handbook
DigitalWatch
- Digital watch write in Verilog HDL language simulate the real clock in Atera DE2 development board
NIOS_LED_1
- FPGA开发 ATERA NIOS2处理器开发实例 控制LED灯-FRGA design
CPU
- lab peogram CPU on kit Atera. mov/ movi / add/ sub lab 9 + lab 10
Crack_QII_11.1_Window11.1
- altera quartus 11.1破解版-altera quartus 11.1破解版工具
test_access_rot_edit2
- This file is VHDL code. sram access code. device name is Atera cyclone2. in quartus8.1 webedition.
Fre_Div
- this is vhdl code. using Frequeny division. out device is LED. device is atera cyclone2.
UART-Altera
- 使用Atera FPGA CycloneII 实现串口通信，遵循RS232协议。FPGA上的模块实现了数据的接收，取补码和发送。(Achieve serial communication with FPGA, following the protocol of RS232.)
KEY3_TEST
- Atera Cyclone IV examples for quartus