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VHDL语言ALU设计
- VHDL语言8位ALU设计
alu
- verilog编写的alu模块-Verilog modules prepared by the ALU
verilog实现ALU的源代码
- verilog实现ALU的源代码，并提供了一个详细的测试平台！-achieve ALU Verilog source code, and provide a detailed test platform!
vhdl实现alu的源代码
- VHDL实现ALU的源代码，并且提供了一个详细的testbench！-ALU VHDL source code, and provide a detailed testbench!
alu
- alu算术逻辑运算单元 主要代码 运行环境为QU6.0-alu arithmetic logic operation unit operating environment for the main code QU6.0
ALU
- vhdl 语言程序设计，包括alu, mux 部分的程序设计。 -VHDL Language Program Design, including alu, mux part of the program design.
ALU
- 用verilog编写的32位alu部件，用于cpu制作-Prepared using Verilog 32 alu parts, used cpu production
ALU
- 用verilog编写的4位ALU，由算术运算模块、逻辑运算模块、选择模块组成-Verilog prepared with 4 ALU, arithmetic operations by the module, logic operations module, select modules
ALU
- 用VERILOG实现ALU，实现各种算术运算，逻辑运算，移位运算等-Realize using Verilog ALU, realize a variety of arithmetic operations, logic operations, shift operations, etc.
alu
- 16位RISC CPU的ALU，使用VHDL编写-16-bit RISC CPU
alu
- 4位ALU逻辑运算单元，可进行加法、减法、逻辑运算、移位等操作。-4 ALU logical operation unit, can be additive, subtraction, logic operations, shift and other operations.
alu
- 实现16种运算的alu,包括+,-,+1,-1,与或非以及移位比较运算。经调试成功。-16 kinds of computing realize alu, including+,-,+ 1,-1, compared with the non-as well as the shift operator. After the successful commissioning.
alu
- 4bit ALU（运算逻辑单元）的设计 给出了此次设计alu的输入输出结构及相应的位数。其中C0是一位的进位输入，A和B分别是4位的数据输入，S0、S1、M分别为一位的功能选择输入信号；Cout是一位的进位输出，F是4为的运算结果输出。-4bit ALU (arithmetic logic unit) design is given in the design of alu input and output structure an
ALU
- ALU可以实现16种操作（包括加减乘除移位运算等）-ALU can be 16 kinds of operations (including addition and subtraction multiplication and division shift operator, etc.)
alu
- 4位alu，包括加减乘除等运算功能，是可综合风格的，包括测试文件-4 alu, including computing functionality, such as addition and subtraction multiplication and division, is a comprehensive style, including the test file
alu
- 用VHDL实现8种运算的ALU，带鱼不带符号的加减乘除，与或异或和求反-Use VHDL to achieve the eight kinds of computing ALU, hairtail unsigned addition and subtraction, multiplication and division, with or XOR and seek anti-
ALU
- vhdl代码 使用quartus编译 cpu中 alu的设计 可作为课程设计的参考 此为16的运算器-VHDL code using Quartus compiler cpu in alu design of curriculum design can be used as a reference for this for 16 computing device
ALU
- 在Xilinx7.1平台下编写的ALU代码，可以实现五位加法、减法、与、异或四种运算！-Xilinx7.1 platform in the preparation of the ALU code, can be achieved five adder, subtraction, and, four computing XOR!
alu
- 算术运算单元ALU的设计,才用VHDL语言编写,有仿真波形-vhdl alu
8-bit-alu
- this is an 8 bit alu. to perform various arithmetic and logical operations