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work1ADD8
- 组合电路的设计8位加法器设计(ADD8.vhd)
work1ADD8
- 组合电路的设计8位加法器设计(ADD8.vhd)-Combinational Circuit Design 8-bit adder design (ADD8.vhd)
Add8
- Computing the addition of two 8-bit numbers and display the result in an output port.-Target PIC16F877A
add8
- 这是用VHDL实现的8位加法器,对新手有点帮助。-This is achieved using VHDL adder 8, a little help to novices.
add8
- 用VHDL语言实现的八位计数器 可进行简单的加减乘除运算-It is a counting device with eight-bit that could plus ,subtract ,multiply and divide.
add8
- carry look ahead 8 bit adder
add8(2)
- 一个基于VHDL语言的8位加法器,有进位功能。-A language based on VHDL 8-bit adder, a carry function.
add8
- 8位加法器,计算机组成原理课程设计,利用Quartus -Eight adder
add8
- 基于FPGA的八位加法器的模块设计方式及其在数字信号处理方面的应用-failed to translate
add8
- 8位加法器 verilog + test bench-8 bits add
add8
- 利用VHDL实现8位数据加法,完成方法为实验原理图直接搭建。-VHDL 8-bit data addition, the completion method for experimental schematic structures directly.
add8
- 8*8位全加器的代码 verilog语言,包含测试文件(8*8-bit full adder code verilog)
verilog add4
- 分两部分,基于verilog的四位和八位加法器设计,用synopsys的VCS仿真工具进行功能仿真,掌握基本的makefile编写以及linux操作。(Divided into two parts, four and eight adder based on verilog design, function simulation with synopsys VCS simulation tools, master the basic m