搜索资源列表
VHDL 的实例程序，共44个
- 经典VHDL 的实例程序，共44个！要下载的尽快-classic examples of VHDL, with a total of 44! To download as soon as possible
frame_decode_and_encode
- 一个用Verilog编写的编帧、解帧及码速匹配的程序，相当经典-Verilog prepared with a series of fr a mes, fr a mes and solutions yards speed matching procedures, rather classic!
HC164
- 用verilog写的HC164的驱动程序，参考了Xilinx的经典算法，做了一点改进~~~很通用，是初学verilog以及FPGA开发很有用的一个程序！
Verilog
- 比较经典的verilog学习书籍，内有丰富的程序实例。-Verilog study compared the classic books, there are abundant examples of the procedures.
examples
- Verilong 经典例子 王金明：《Verilog HDL 程序设计教程》-Wang Jinming Verilong classic example: " Verilog HDL Design Tutorial"
Verilog_135example
- Verilog的135个经典设计实例包括常用的程序、函数等-Verilog design 135 Classic examples include the commonly used procedure, function, etc.
hw8
- Verilog中经典的自动售货机的源代码，包含测试程序-Vending machine in the classic Verilog source code, including test procedures
verilog
- 两本非常好的Verilog入门学习资料，Verilog程序设计135例，Verilog经典教程，通过学习此教程，可基本掌握Verilog。-Two very good entry-learning materials Verilog, Verilog programming 135 cases, Verilog classic tutorial, by learning this tutorial, you can master the
Verilog---shejijingdianshili
- 经典Verilog的程序设计实例，里面包含了各个实例的详细解释和分析，适合各类开发人员使用-Verilog programming classic example, which contains a detailed explanation of each instance and analysis for all types of developers
verilog-program
- 国外经典verilog程序集锦，含有从最简单的定时器创建到复杂逻辑的实现。-Classic Collection verilog program abroad, with the timer created from the most simple to complex logic.
Verilog-hdlFPGA
- 关于FPGA的提高篇，Verilog HDL语言写的， 包含LCD控制VHDL程序与仿真，AD/DA，MASK，FSK，PSK，正弦波发生器，等等经典程序-Articles on improving the FPGA, Verilog HDL language, and includes LCD control procedures and VHDL simulation, AD/DA, MASK, FSK, PSK, sine wav
Verilog
- 针对Verilog语言，提供了135个经典的示例程序代码，从简单到复杂，一步步的深入。-For the Verilog language, providing 135 classic example code, from simple to complex, step by step in depth.
135EGs_of_Verilog
- 135个Verilog经典程序，初学者可以多-135 Verilog classic program, beginners can see more
Verilog-HDL
- 此压缩文件包里是一些很经典的用Verilog硬件描述语言编写的程序，有需要的朋友可以看看。-This compressed file package is very classic with Verilog hardware descr iption language programs, there is a need friends can see.
Experiment
- 经典入门verilog入门程序20个，从流水灯到液晶显示包括VGA驱动 入门必备精品-Classic entry Verilog entry procedures 20
Verilog的135个经典设计实例
- Verilog的135个经典设计实例，Verilog从业者学习者的很实用的资料(Classic design examples based on Verilog)
Verilog 150 classical examples
- FPGA VerilogHDL程序设计的150个经典实例，实用的FPGA学习与开发参考资料。(150 classical examples of FPGA VerilogHDL programming)
VerilogHDL的135个经典设计实例
- Verilog HDL编程设计学习程序例子，含详细说明(Verilog HDL programming design learning examples, including detailed descr iption)
Verilog的135个经典设计实例
- Verilog的135个经典设计实例，部分摘录如下：【例 9.23】可变模加法/减法计数器【例 11.7】自动售饮料机【例 11.6】“梁祝”乐曲演奏电路【例 11.5】交通灯控制器【例 11.2】4 位数字频率计控制模块【例 11.1】数字跑表【例 9.26】256×16 RAM 块【例 9.27】4 位串并转换器【例 11.8】多功能数字钟【例 11.9】电话计费器程序【例 12.13】CRC 编码【例 12.12】（7，4）循环码
1_Carm
- 经典的OV5642的verilog驱动程序(Verilog Driver of Classic OV5642)