搜索资源列表
any_frequency_VHDL
- 任意整数分频器的vhdl源程序,放心使用. 无版权问题,欢迎copy.
any_frequency_VHDL
- 任意整数分频器的vhdl源程序,放心使用. 无版权问题,欢迎copy.-Arbitrary integer divider of the VHDL source code, ease of use. No copyright issues are welcome to copy.
divider
- 该模块为分频器，将1KHZ的时钟频率分频成每分钟一次的时钟频率 事实上，该源码可以实现任意整数的分频，主要让N的值设置好相应的数字-The module for the divider, the clock frequency 1KHz frequency per minute into the first clock frequency In fact, the source can be any integer frequenc
ghzfchsa
- 数控分频器，可实现50m以内任意整数分频-NC divider can be realized within 50m of arbitrary integer frequency
zq_100us
- 利用VHDL实现偶数分频，设计了一种能够实现等占空比的任意偶数分频、等占空比任意奇数分频、不等占空比的任意半整数分频的较为通用的分频器,并通过QuartusII进行了功能仿真。 -Use VHDL to achieve an even frequency, designed to achieve such a duty cycle of any even frequency, such as the duty cycle divid
fenpin
- 用VHDL写的一段很小的任意整数分频器，可以设置任意整数数值，来获得所要的分频值-Use VHDL to write for some small arbitrary integer divider can be set to any integer value, so as to obtain the desired divider value
myproject
- 开发环境ISE，使用VHDL语言实现了任意整数分配的分频器，又有一个信号可以控制左转右转的流水等。-Development environment ISE using VHDL language to achieve arbitrary integer assigned crossover, there is another signal control Zuozhuanyouzhuan running water, etc..
Half_Frequence
- 本程序基于VHDL语言，设计分频器，其中包含半整数分频占空比不为50 奇数分频占空比为50 任意小数分频 -The program is based on VHDL language design divider, which includes half-integer divider 50 duty cycle is not odd frequency 50 duty cycle any fractional
fenpin51
- 任意整数分频器，输出方波可调占空比（已仿真下板子验证）第一个系数为分频系数，第二个为高电平所占整个方波的比例(Arbitrary integer frequency divider, output square wave adjustable duty cycle (has been simulated under board verification), the first factor for the frequency divis