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P4_PPC_SDRAM_Reference_Design
- SDRAM 参考设计:主要包括The following figure shows a high-level block diagram for this reference design followed by a brief descr iption of each sub-section. The design consists of: · PowerPC processor · PLB-OPB bridge ·
jq_transfile.ARJ
- JQ文件传输程序 -JQ file transfer procedure
P4_PPC_SDRAM_Reference_Design
- SDRAM 参考设计:主要包括The following figure shows a high-level block diagram for this reference design followed by a brief descr iption of each sub-section. The design consists of: · PowerPC processor · PLB-OPB bridge ·
vga_geometry_xps92i_s3_v01_00_03
- Here an embedded System-on-Chip is build, in an Xilinx Spartan-3 FPGA with Microblaze as the processor.A PLB core System is made with the VGA IP core attached to it. The software written for the MicroBlaze processor spec
plbv46_slave_burst
- PLB for EDK platform datasheet
plb
- 图书管理系统可行性分析报告书 软件工程课程设计-Library management system software engineering feasibility analysis report on curriculum design
I2C_Slave
- 这是iic Slave模式的源代码，可用于嵌入式FPGA，挂载在PLB总线上-This is iic Slave mode, the source code for embedded FPGA, mounted on the PLB bus
fle_lcd_plb
- lcd interface using plb bus
PLB_MG
- PLB Macrogate in VHDL
xapp941
- Reference System: PLB Tri-Mode Ethernet MAC
05_UART_demo
- 该UART实例是很简单的EDK工程，在PLB总线上挂载了XPS-uartlite外围设备，作为串口的控制器，一般的EDK工程会将该IP作为基本外围设备来使用。包含bit流文件(在EDK上下载到FPGA上使用），和说明文档。-The UART instance EDK project is very simple and is mounted on the PLB bus the XPS-uartlite peripherals, gen
uart_plb_latest.tar
- Uart 功能支持PLB总线，异步收发功能等-Uart desciption