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MSP-FET430P140 C Examples
- MSP-FET430P140 C语言例子程序-MSP-FET430P140 C language examples procedures
fet140_2
- MSP-FET430P140 Demo - Software Toggle P1.0-MSP-FET430P140 Demo-Toggle P1.0 Software
fet140_adc12_11
- MSP-FET430P140 Demo - ADC12, Single Channel Rpt Mode, TA1 as Sample Trigger-MSP-FET430P140 Demo-ADC12. Rpt Single Channel Mode, TA1 as Sample Trigger
fet140_clks
- MSP-FET430P140 Demo - Basic Clock, Output Buffered SMCLK, ACLK and MCLK
fet140_dma_07
- MSP-FET430P140 Demo - DMA0/1, Rpt d Blk to DAC0/1, Sin/Cos, TACCR1, XT2-MSP-FET430P140 Demo-DMA0 / a, Rpt d Blk to DAC0 / 1, Sin / Cos, TACCR1, XT2
fet140_flashwrite_01
- MSP-FET430P140 Demo - Flash In-System Programming, Copy SegA to SegB-MSP-FET430P140 Demo-Flash In-System Pro gramming, Copy SegA to SegB
fet140_i2c_17
- MSP-FET430P140 Demo - I2C, Slave Reads/Writes with Master, Rptd Start-MSP-FET430P140 Demo-I2C, Slave Reads / Writes with Master, Rptd Start
fet140_spi1_04
- MSP-FET430P140 Demo - USART1, SPI Full-Duplex 3-Wire Master P1.x Exchange-MSP-FET430P140 Demo-USART1. SPI Full-Duplex 3-Wire Master P1.x Exchange
fet140_tb_09
- MSP-FET430P140 Demo - Timer_B, PWM TB1-2, Up/Down Mode, DCO SMCLK-MSP-FET430P140 Demo-Timer_B, PWM TB1-2. Up / Down Mode, the making of SMCLK
fet140_spi
- MSP-FET430P140 Demo - USART0, SPI Interface to HC165/164 Shift Registers Descr iption: Demonstrate USART0 in two-way SPI mode. Data are read from an HC165, and same data written back to the HC164. ACLK = n/a MCL
MSP-FET430P140 C Examples
- MSP-FET430P140 C语言例子程序-MSP-FET430P140 C language examples procedures
fet440_uart11_38400
- MSP430F449 子程序,MSP-FET430P440 Demo - USART1 UART 38400 Echo ISR, DCO SMCLK.-MSP430F449 subroutine, MSP-FET430P440 Demo-USART1 UART 38400 Echo IS R, the making of SMCLK.
fet140_2
- MSP-FET430P140 Demo - Software Toggle P1.0-MSP-FET430P140 Demo-Toggle P1.0 Software
fet140_adc12_11
- MSP-FET430P140 Demo - ADC12, Single Channel Rpt Mode, TA1 as Sample Trigger-MSP-FET430P140 Demo-ADC12. Rpt Single Channel Mode, TA1 as Sample Trigger
fet140_clks
- MSP-FET430P140 Demo - Basic Clock, Output Buffered SMCLK, ACLK and MCLK-MSP-FET430P140 Demo- Basic Clock, Output Buffered SMCLK, ACLK and MCLK
fet140_dma_07
- MSP-FET430P140 Demo - DMA0/1, Rpt d Blk to DAC0/1, Sin/Cos, TACCR1, XT2-MSP-FET430P140 Demo-DMA0/a, Rpt d Blk to DAC0/1, Sin/Cos, TACCR1, XT2
fet140_i2c_17
- MSP-FET430P140 Demo - I2C, Slave Reads/Writes with Master, Rptd Start-MSP-FET430P140 Demo-I2C, Slave Reads/Writes with Master, Rptd Start
fet140_spi1_04
- MSP-FET430P140 Demo - USART1, SPI Full-Duplex 3-Wire Master P1.x Exchange-MSP-FET430P140 Demo-USART1. SPI Full-Duplex 3-Wire Master P1.x Exchange
fet140_spi
- MSP-FET430P140 Demo - USART0, SPI Interface to HC165/164 Shift Registers Descr iption: Demonstrate USART0 in two-way SPI mode. Data are read from an HC165, and same data written back to the HC164. ACLK = n/a MCL