搜索资源列表
DISPLAY-vhdl
- vhdl描述的显示代码 maxplus2开发环境-VHDL descr iption of the display code development environment maxplus2
ERFREE_COUNTER-vhdl
- maxplus2为开发环境 vhdl编写的自由 计数器 程序-maxplus2 VHDL environment for the development of free counter preparation procedures
KEYBOARD_DEC-vhdl
- maxplus2为开发环境 vhdl编写的 键盘 程序-maxplus2 VHDL development environment for the preparation of the keyboard procedures
max+plus ii快速入门
- maxplus2是一款应用于硬件编程的编程软件，本文件教你快速掌握其编程，仿真方法。-maxplus2 hardware is a programming application programming software, this document will teach you grasp its programming and simulation methods.
sum99
- 基于maxplus2的八位加法器，已经通过仿真-maxplus2 based on the eight Adder, through simulation
maxplus2
- 关于CPLD的文章 不错的! 可以给菜菜参考下-article on the CPLD good! Can either under reference
edaclock
- maxplus2变得电子钟程序/// ///// -maxplus2 become electronic bell procedures
159357
- 是一个用 maxplus2做的vhdl 很平常的课程小设计 -is a maxplus2 do with vhdl very common small design courses
con1
- maxplus2!!!!!!!!!!!!!!! 自动售货机 vhdl-vending machine VHDL maxplus2 !!!!!!!!!!!!!!!
ram_read_write
- 本程序是为FPGA系统所设计的一个简单的存储和读取数据的小程序，MAXPLUS2编写-This procedure is for the FPGA system design a simple data storage and reading of small procedures, MAXPLUS2 prepared
chuankou_data_send
- 这是FPGA系统的一个简单的与上位机串行通讯的的小程序，MAXPLUS2编写-This is the FPGA system with a simple PC serial communication of small programs, MAXPLUS2 prepared
testled
- 为FPGA系统所设计的一个简单的控制LED灯显示的小程序，用MAXPLUS2编写-For the FPGA system designed to control a simple LED lights to display a small program to prepare MAXPLUS2
eda
- 来自某名牌大学电子实验室的eda指导教程，主要介绍了maxplus2，适合初学者-From a prestigious university guide EDA Electronic lab tutorials, mainly the introduction maxplus2, suitable for beginners
MAXPLUS2
- EDA课程所用的Max Plus2软件，制作的半加器，有图像文件，有波形文件，建议看看，-EDA courses used by Max Plus2 software, produced a half-adder, there are image files, documents have waveform, it is recommended to see,
jiaotongdeng
- 交通灯控制系统VHDL源码，用VHDL语言、MAXPLUS2环境设计实现-VHDL core
maxplus2
- 开发VHDL的工具，MAX+PLUSII 直接下载使用,-VHDL development tools, MAX+ PLUSII direct download,
shijian
- 基于Verilog hdl的简单的24小时时钟显示电路带有计数功能，maxplus2上运行-Based on Verilog hdl simple circuit with 24-hour clock display count function, maxplus2 run
maxplus2
- this a good tutorial for maxplus2-this is a good tutorial for maxplus2
Max_Plus_II-_tutorial
- Max+plusII(或写成Maxplus2,或MP2) 是Altera公司推出的的第三代PLD开发系统(Altera第四代PLD开发系统被称为：QuartusII，主要用于设计新器件和大规模CPLD/FPGA).使用MAX+PLUSII的设计者不需精通器件内部的复杂结构。设计者可以用自己熟悉的设计工具（如原理图输入或硬件描述语言）建立设计，MAX+PLUSII把这些设计转自动换成最终所需的格式。其设计速度非常快。Maxplus2被公认
maxplus2
- 用maxplus2设计的心率计，能实现心率的测量，并且能分辨出心跳是否正常-Maxplus2 design with heart rate meter, measuring heart rate can be achieved, and can distinguish between normal heartbeat