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I2C_verilog
- I2C总线verilog实现源码，可以完整实现I2C bus的基本功能-I2C Bus verilog achieving source, I2C bus integrity of the basic functions
I2C_verilog
- I2C总线是Philips公司推出的双向两线串行通讯标准，具有接口线少、通讯效率高等特点。将I2C总线设计成FPGA内部的模块，可以方便FPGA与其他具有I2C总线的设备通信。
I2C_Verilog
- I2C 控制器的 Verilog源程序 example
i2c_verilog
- i2c的verilog代码，转载的他人的资料
I2C_verilog
- 用verilog设计了一个简洁而实用的I2C总线控制器，对大家学习FPGA和I2C总线接口等相关方面的知识有较大的帮助。
I2C_verilog
- I2C总线verilog实现源码，可以完整实现I2C bus的基本功能-I2C Bus verilog achieving source, I2C bus integrity of the basic functions
I2C_verilog
- I2C总线是Philips公司推出的双向两线串行通讯标准，具有接口线少、通讯效率高等特点。将I2C总线设计成FPGA内部的模块，可以方便FPGA与其他具有I2C总线的设备通信。-I2C bus is Philips has introduced two-way two-wire serial communication standard, with fewer line interface, communications and hig
I2C_Verilog
- I2C 控制器的 Verilog源程序 example-I2C controller Verilog source code example
i2c_verilog
- i2c的verilog代码，转载的他人的资料-i2c the Verilog code, reproduced in other people
I2C_verilog
- 用verilog设计了一个简洁而实用的I2C总线控制器，对大家学习FPGA和I2C总线接口等相关方面的知识有较大的帮助。-Verilog design using a simple and practical I2C bus controller, for everyone to learn FPGA and I2C bus interface and other related knowledge has a greater help
i2c_Verilog
- Verilog开发的I2c接口模块，如何需要更详细的资料，请参考www.opencores.org网站-Verilog development I2C interface module, how the need for more detailed information, please refer to website www.opencores.org
I2C_Verilog
- I2c控制器的verilog代码及说明文件-verilog code and notes of i2c controller
i2c_verilog
- verilog i2c 控制源代码，包括读写控制-verilog i2c source code control
i2c_verilog.tar
- i2c的逻辑设计实现，有详细的文档说明，供大家学习使用-i2c Design and Implementation of the logic, the document explains in detail for them to learn from the use of
I2C_Verilog
- I2C（Intel-Integrated Circuit bus）为内部IC控制的双向串行总线，用于连接微控制器及其外围设备的互连。该程序用Verilog HDL语言来实现FPGA模拟I2C协议作为主端对I2C从设备进行读/写操作。-I2C (Intel-Integrated Circuit bus) control IC for internal bi-directional serial bus for connecting mic
i2c_verilog
- FPGA读写i2c的内部数据基于verilog语言的描述，按照内部时序访问-I2c data read and write the internal FPGA verilog language based on the descr iption, in accordance with the internal timing to visit
i2c_verilog
- 该源程序包是I2C的Verilog语言模型，包括以下3个部分：document,source,testfixture。-The source package is the I2C Verilog language models, including the following three parts: document, source, testfixture.
i2c_verilog
- vrilog实现的i2c程序，可以借鉴和学习-vrilog achieve i2c program, can learn from
i2c_verilog
- I2C Master IP 核 I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices. It is most suitable for applications requiring occasional communication
i2c_verilog
- I2C master verilog. write and read are tested well.