搜索资源列表
fpga_cpld
- 一份fpga/cpld的入门教程，对初学者很有帮助。-a fpga / cpld introductory tutorial for beginners helpful.
FPGA_CPLD
- 该PDF文档是CPLD/FPGA的入门教程。里面叙述了PLD的基本结构，选择CPLD/FPGA的方式方法。
FPGA_CPLD-SHC
- 多款FPGA CPLD开发板的原理图，很好的线路设计参考
FPGA_CPLD
- 该PDF文档是CPLD/FPGA的入门教程。里面叙述了PLD的基本结构，选择CPLD/FPGA的方式方法。-The PDF document is the CPLD/FPGA introductory tutorial. Which describes the basic structure of PLD, select the CPLD/FPGA ways.
FPGA_CPLD-SHC
- 多款FPGA CPLD开发板的原理图，很好的线路设计参考-Variety of FPGA CPLD development board schematics, a good reference circuit design
FPGA_CPLD
- 对fpga和cpld进行深入研究，并且针对这两者的不同结构进行的详细阐述-FPGA and CPLD to conduct an in-depth research, and for these two different structures of detailed descr iption of
AlteraFPGACPLD1
- Altera FPGA_CPLD设计 基础篇-Altera FPGA_CPLD Part Design
FPGA_CPLD
- 其中详细的介绍了如何用QUATUS2软件来实现FPGA和CPLD的综合设计-Which describes in detail how to achieve QUATUS2 software integrated FPGA and CPLD design
FPGA_CPLD
- FPGA CPLD入门教程 对于初学者很实用-FPGA CPLD Getting Started tutorial is very useful for beginners
AlteraFPGA
- quartus II 软件入门和进阶，是《ALtera fpga_cpld 设计》（基础篇）-quartus II software, introductory and advanced, is " ALtera fpga_cpld design" (Basics)
Altera_FPGA_CPLD
- Altera FPGA_CPLD设计 基础篇-Altera FPGA_CPLD Design Basics
Altera_FPGA_CPLD_Designing(Advanced)
- Altera FPGA_CPLD设计(高级篇) Altera FPGA/CPLD学习的优秀参考书-Altera_FPGA_CPLD_Designing(Advanced)
AlteraFPGA_CPLD1
- Altera FPGA_CPLD设计 基础篇[1]\AlteraFPGA_CPLD1-Altera FPGA_CPLD Design Basics [1] \ AlteraFPGA_CPLD1
Altera-FPGA_CPLD-design
- Altera FPGA_CPLD设计 高级篇-Altera FPGA_CPLD advanced part design
FPGA_CPLD-SHC
- FPGA_CPLD-SHC多款FPGA CPLD开发板的原理图，很好的线路设计参考-FPGA_CPLD-SHC Variety of FPGA CPLD development board schematics, a good reference circuit design
Xilinx-ISE9.x-FPGA_CPLD(source).RAR
- Xilinx ISE9.x FPGA_CPLD一书的例程代码-Xilinx ISE9.x FPGA_CPLD a book routines code
Altera-FPGA_CPLD-design-Advanced
- 《Altera FPGA_CPLD设计 高级篇》详细介绍FPGA应用于高级特性，LogicLock设计，时序约束，设计优化，高级工具及系统级设计技术，是深入学习FPGA的重要材料-" Altera FPGA_CPLD advanced part design" details FPGA used in advanced features, LogicLock design, timing constraints, de
Altera FPGA_CPLD设计_高级篇【www.ourfpga.com】
- Altera FPGA_CPLD设计_高级篇,对fpga的提高很有帮助(can improve the application of fpga)