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CIC滤波器的补偿
- CIC滤波器的补偿，适用于抽取内插滤波器的设计
cic
- 个人编写的关于积梳状滤波器的程序,用于抽取和插值时防止信号失真.-individuals prepared on the plot comb filter procedures for taking and the interpolation to prevent signal distortion.
cic
- verilog码写的CIC滤波器的程序，包括4倍抽取CIC滤波器和内插的CIC滤波器两个-Verilog code written by CIC filter procedures, including 4 times the extraction CIC filter and the CIC interpolation filter two
cic_4_dec
- 实现4倍抽取的CIC抽取滤波器模块的Verilog实现，在对数据进行抽取之前，首先进行滤波-Extracted 4 times realize CIC decimation filter module Verilog realize that in the data collected before the first filter
cic512
- 5阶cic滤波器，抽取12倍，的verilog程序，已经通过仿真验证，一、具有很高的速率-5-order CIC filter, collected 12 times the Verilog procedures are by simulation, one with a very high rate
CIC
- 关于一个滤波器的程序，三级CIC抽取的源程序。-On a filter process, the three-tier CIC samples of the source.
cic3_decimator
- 积分梳状滤波器，CIC设计，三级CIC抽取器实例：cic3_decimator.V module cic3_decimator(clk, x_in, y_out)-cic
CIC_deci4
- cic抽取滤波器ip核，用于射频采样数字下变频模块的核心数字信号处理部分.此ip核已经过ise10.2验证-CIC decimation by 4 filter，used in Direct RF sampling of GPS signal. the core dsp block in a frondend design
cic
- 当前工程上广泛采用了一种高效滤波器，即CIC（cascaded integrator-comb filter）将其作为第一级来实现抽取、低通滤波。第二级再用一个普通的FIR滤波器就实现使后端设备工作在较低的频率下且硬件花销少、功耗也很低。-Widely used in the current project, a highly efficient filter, that is, CIC (cascaded integrator-com
CIC8_fir_comp_mlab
- CIC抽取补偿滤波器设计，CIC滤波器采用5阶8倍抽取。-CIC compensation filter design samples, CIC filter order of 8 times 5 samples.
CIC4_fir_comp_mlab
- CIC抽取补偿滤波器设计，CIC滤波器采用5阶4倍抽取。-CIC compensation filter design samples, CIC filter order 4 times using 5 samples.
CIC_DEC
- CIC抽取滤波器设计，CIC滤波器采用5阶8倍抽取。-CIC decimation filter design, CIC filter order of 8 times 5 samples.
CIC_DEC_3
- CIC抽取滤波器设计，CIC滤波器采用5阶3倍抽取。-CIC decimation filter design, CIC filter order 3 times 5 samples.
CIC_DEC_4
- CIC抽取滤波器设计，CIC滤波器采用5阶4倍抽取。-CIC decimation filter design, CIC filter order 4 times using 5 samples.
CIC_DEC_6
- CIC抽取滤波器设计，CIC滤波器采用5阶6倍抽取。-CIC decimation filter design, CIC filter stage 6 times 5 samples.
cic_fpga
- CIC抽取滤波器的改进及其FPGA的实现.pdf-cic _fpga
cic_dec_8_five
- CIC抽取滤波器，抽取系数8,verilog版本，用于数字下变频-CIC decimation filter, extraction coefficient of 8, verilog version, for digital down-conversion
CIC
- 3级CIC抽取,内插滤波，r为抽取因子，n为原始信号的采样点数，x为原始信号序列 y为抽取滤波后的输出序列-3 CIC decimation, interpolation filter, r for the extraction factor, n the sampling points for the original signal, x is the original signal sequence y to extract the
cic
- 在信号处理中，信号发射时，信号通过载波，调制，以电磁波的形式发射出来 在接收端，射频信号通过天线接收，超外差式等方式进行处理，变频到中频 然后通过数字技术对中频信号进行处理，此时的中频信号采样率很高，多达几十兆赫 而要解调出来的信号很小，此时就要经过滤波来得到我们需要的信号 如果直接设计滤波器，阶数会非常庞大，软件，硬件设备都承受不了 因此，一般常用的技术是进行下变频处理，其主要技术就是通过抽取滤波进行下变频 常
cic
- CIC积分梳状滤波器的程序、是生成五级CIC抽取器：cic3_decimator.V-CIC CIC filter program, is to generate five CIC decimator: cic3_decimator.V