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seven-segments
- 这个代码可以在Artix-7实现在数码管上显示一些字符的功能，通过修改源码内容可以显示其他字符-The code can display strings on the seven-segment screen.
DIGITAL_CLOCK_INC
- I HAVE UPLOADED A DESIGN WITH THE IMPLEMENTATION OF DIGITAL CLOCK WITH INCREMENT AND DECREMENT BUTTON BASED ON FPGA(ARTIX-7) BOARD-I HAVE UPLOADED A DESIGN WITH THE IMPLEMENTATION OF DIGITAL CLOCK WITH INCREMENT AND DECR
nexys4-ddr_sw_demo
- The Nexys4 DDR board is a complete, ready-to-use digital circuit development platform based on the latest Artix-7™ Field Programmable Gate Array (FPGA) Xilinx® . With its large, high-capacity FPGA (Xilinx
BASYS-3-Artix-7
- 使用BASYS 3 Artix-7 FPGA设计数字系统和数字逻辑的VHDL代码-VHDL code for designing digital systems and digital logic using the BASYS 3 Artix-7 FPGA
S02《Artix7*秘籍》MIG_DDR内存应用
- artix 7系列 fpga mig ddr3应用教程(Artix 7 Series FPGA MIG DDR3 Application Tutorial)
AM调制解调
- 基于Artix-7 FPGA的AM调制解调代码，从AD读入信号后，进行AM调制，并解调输出（将代码分成两个工程就是AM的调制和解调），其中解调用到的数字滤波采用MATLAB设计(The AM modulation and demodulation code based on artix-7 FPGA, after reading the signal from AD, carries out AM modulation, and dem
lab6
- 使用vivado和Xilinx开发板实现VGA图像显示，开发板为Xilinx Artix-7(Using vivado and Xilinx development board to realize VGA image display, the development board is Xilinx artix-7)
lab7
- 使用vivado和Xilinx开发板实现蓝牙远程控制，开发板为Xilinx Artix-7(Using vivado and Xilinx development board to realize Bluetooth remote control, the development board is Xilinx artix-7)