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LVDS_DDR_List_FPGA2
- FPGA芯片与ADI公司的AD9779之间的通信,总共有四个通道,68对LVDS,采样时钟是122.88MHz-FPGA chips ADI' s AD9779 and communication between, a total of four channels, 68 pairs of LVDS, the sampling clock is 122.88MHz
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- X5045驱动程序;1602液晶显示程序;AD9518读写控制;AD9779读写控制;音频编解码。-X5045 driver 1602 liquid crystal display procedures AD9518 control read and write AD9779 to read and write control audio codec.
ADuC831_c_code
- 使用ADUC控制LMX2306TM, CDC7005, AD9779, ADF4350, PE4306等芯片的读写操作。-Use ADUC control LMX2306TM, CDC7005, AD9779, ADF4350, PE4306 and other chips to read and write operations.